fix(tree): correct some typosfound using codespell (https://github.com/codespell-project/codespell).Signed-off-by: Elyes Haouas <ehaouas@noos.fr>Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6
fix(tree): correct some typosfound using codespell (https://github.com/codespell-project/codespell).Signed-off-by: Elyes Haouas <ehaouas@noos.fr>Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
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imx: support for i.MX8 SoCs misc IPCNXP's i.MX8 SoCs have system controller (M4 core) which takescontrol of misc functions like temperature alarm, dma etc., otherCortex-A clusters can send out co
imx: support for i.MX8 SoCs misc IPCNXP's i.MX8 SoCs have system controller (M4 core) which takescontrol of misc functions like temperature alarm, dma etc., otherCortex-A clusters can send out command via MU (Message Unit) tosystem controller for misc operation etc..This patch adds misc IPC(inter-processor communication) support.Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Support for NXP's i.MX8 SoCs timer IPCNXP's i.MX8 SoCs have system controller (M4 core) which takescontrol of timer management, including watchdog, srtc and systemcounter etc., other clusters lik
Support for NXP's i.MX8 SoCs timer IPCNXP's i.MX8 SoCs have system controller (M4 core) which takescontrol of timer management, including watchdog, srtc and systemcounter etc., other clusters like Cortex-A35 can send out commandvia MU (Message Unit) to system controller for timer operation.This patch adds timer IPC(inter-processor communication) support.Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Standardise header guards across codebaseAll identifiers, regardless of use, that start with two underscores arereserved. This means they can't be used in header guards.The style that this proje
Standardise header guards across codebaseAll identifiers, regardless of use, that start with two underscores arereserved. This means they can't be used in header guards.The style that this project is now to use the full name of the file incapital letters followed by 'H'. For example, for a file called"uart_example.h", the header guard is UART_EXAMPLE_H.The exceptions are files that are imported from other projects:- CryptoCell driver- dt-bindings folders- zlib headersChange-Id: I50561bf6c88b491ec440d0c8385c74650f3c106eSigned-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Support for NXP's i.MX8 SoCs IPCNXP's i.MX8 SoCs have system controller (M4 core)which takes control of clock management, power management,partition management, PAD management etc., othercluster
Support for NXP's i.MX8 SoCs IPCNXP's i.MX8 SoCs have system controller (M4 core)which takes control of clock management, power management,partition management, PAD management etc., otherclusters like Cortex-A35 can send out command via MU(Message Unit) to system controller for clock/powermanagement etc..This patch adds basic IPC(inter-processor communication) support.Signed-off-by: Anson Huang <Anson.Huang@nxp.com>