1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arm_config.h> 8 #include <plat_arm.h> 9 #include <platform.h> 10 #include <smmu_v3.h> 11 #include "fvp_private.h" 12 13 void __init bl31_early_platform_setup2(u_register_t arg0, 14 u_register_t arg1, u_register_t arg2, u_register_t arg3) 15 { 16 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 17 18 /* Initialize the platform config for future decision making */ 19 fvp_config_setup(); 20 21 /* 22 * Initialize the correct interconnect for this cluster during cold 23 * boot. No need for locks as no other CPU is active. 24 */ 25 fvp_interconnect_init(); 26 27 /* 28 * Enable coherency in interconnect for the primary CPU's cluster. 29 * Earlier bootloader stages might already do this (e.g. Trusted 30 * Firmware's BL1 does it) but we can't assume so. There is no harm in 31 * executing this code twice anyway. 32 * FVP PSCI code will enable coherency for other clusters. 33 */ 34 fvp_interconnect_enable(); 35 36 /* On FVP RevC, intialize SMMUv3 */ 37 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) 38 smmuv3_init(PLAT_FVP_SMMUV3_BASE); 39 } 40