1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <k3_console.h> 13 #include <k3_gicv3.h> 14 #include <platform_def.h> 15 #include <string.h> 16 #include <ti_sci.h> 17 #include <xlat_tables_v2.h> 18 19 /* Table of regions to map using the MMU */ 20 const mmap_region_t plat_k3_mmap[] = { 21 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 22 MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 23 MAP_REGION_FLAT(K3_GICD_BASE, K3_GICD_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 24 MAP_REGION_FLAT(K3_GICR_BASE, K3_GICR_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 25 MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 26 MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 27 MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 28 { /* sentinel */ } 29 }; 30 31 /* 32 * Placeholder variables for maintaining information about the next image(s) 33 */ 34 static entry_point_info_t bl32_image_ep_info; 35 static entry_point_info_t bl33_image_ep_info; 36 37 /******************************************************************************* 38 * Gets SPSR for BL33 entry 39 ******************************************************************************/ 40 static uint32_t k3_get_spsr_for_bl33_entry(void) 41 { 42 unsigned long el_status; 43 unsigned int mode; 44 uint32_t spsr; 45 46 /* Figure out what mode we enter the non-secure world in */ 47 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 48 el_status &= ID_AA64PFR0_ELX_MASK; 49 50 mode = (el_status) ? MODE_EL2 : MODE_EL1; 51 52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 53 return spsr; 54 } 55 56 /******************************************************************************* 57 * Perform any BL3-1 early platform setup, such as console init and deciding on 58 * memory layout. 59 ******************************************************************************/ 60 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 61 u_register_t arg2, u_register_t arg3) 62 { 63 /* There are no parameters from BL2 if BL31 is a reset vector */ 64 assert(arg0 == 0U); 65 assert(arg1 == 0U); 66 67 bl31_console_setup(); 68 69 #ifdef BL32_BASE 70 /* Populate entry point information for BL32 */ 71 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 72 bl32_image_ep_info.pc = BL32_BASE; 73 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 74 DISABLE_ALL_EXCEPTIONS); 75 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 76 #endif 77 78 /* Populate entry point information for BL33 */ 79 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 80 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 81 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 82 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 83 84 #ifdef K3_HW_CONFIG_BASE 85 /* 86 * According to the file ``Documentation/arm64/booting.txt`` of the 87 * Linux kernel tree, Linux expects the physical address of the device 88 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 89 * must be 0. 90 */ 91 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 92 bl33_image_ep_info.args.arg1 = 0U; 93 bl33_image_ep_info.args.arg2 = 0U; 94 bl33_image_ep_info.args.arg3 = 0U; 95 #endif 96 } 97 98 void bl31_plat_arch_setup(void) 99 { 100 const mmap_region_t bl_regions[] = { 101 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 102 MT_MEMORY | MT_RW | MT_SECURE), 103 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 104 MT_CODE | MT_SECURE), 105 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END, 106 MT_RO_DATA | MT_SECURE), 107 {0} 108 }; 109 110 setup_page_tables(bl_regions, plat_k3_mmap); 111 enable_mmu_el3(0); 112 } 113 114 void bl31_platform_setup(void) 115 { 116 k3_gic_driver_init(K3_GICD_BASE, K3_GICR_BASE); 117 k3_gic_init(); 118 119 ti_sci_init(); 120 } 121 122 void platform_mem_init(void) 123 { 124 /* Do nothing for now... */ 125 } 126 127 unsigned int plat_get_syscnt_freq2(void) 128 { 129 return SYS_COUNTER_FREQ_IN_TICKS; 130 } 131 132 /* 133 * Empty function to prevent the console from being uninitialized after BL33 is 134 * started and allow us to see messages from BL31. 135 */ 136 void bl31_plat_runtime_setup(void) 137 { 138 } 139 140 /******************************************************************************* 141 * Return a pointer to the 'entry_point_info' structure of the next image 142 * for the security state specified. BL3-3 corresponds to the non-secure 143 * image type while BL3-2 corresponds to the secure image type. A NULL 144 * pointer is returned if the image does not exist. 145 ******************************************************************************/ 146 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 147 { 148 entry_point_info_t *next_image_info; 149 150 assert(sec_state_is_valid(type)); 151 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 152 &bl32_image_ep_info; 153 /* 154 * None of the images on the ARM development platforms can have 0x0 155 * as the entrypoint 156 */ 157 if (next_image_info->pc) 158 return next_image_info; 159 160 NOTICE("Requested nonexistent image\n"); 161 return NULL; 162 } 163