1# 2# Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Cortex A57 specific optimisation to skip L1 cache flush when 8# cluster is powered down. 9SKIP_A57_L1_FLUSH_PWR_DWN ?=0 10 11# Flag to disable the cache non-temporal hint. 12# It is enabled by default. 13A53_DISABLE_NON_TEMPORAL_HINT ?=1 14 15# Flag to disable the cache non-temporal hint. 16# It is enabled by default. 17A57_DISABLE_NON_TEMPORAL_HINT ?=1 18 19WORKAROUND_CVE_2017_5715 ?=1 20WORKAROUND_CVE_2018_3639 ?=1 21DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0 22 23# Process SKIP_A57_L1_FLUSH_PWR_DWN flag 24$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN)) 25$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN)) 26 27# Process A53_DISABLE_NON_TEMPORAL_HINT flag 28$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT)) 29$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT)) 30 31# Process A57_DISABLE_NON_TEMPORAL_HINT flag 32$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT)) 33$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT)) 34 35# Process WORKAROUND_CVE_2017_5715 flag 36$(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715)) 37$(eval $(call add_define,WORKAROUND_CVE_2017_5715)) 38 39# Process WORKAROUND_CVE_2018_3639 flag 40$(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639)) 41$(eval $(call add_define,WORKAROUND_CVE_2018_3639)) 42 43$(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639)) 44$(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639)) 45 46ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0) 47 ifeq (${WORKAROUND_CVE_2018_3639},0) 48 $(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1") 49 endif 50endif 51 52# CPU Errata Build flags. 53# These should be enabled by the platform if the erratum workaround needs to be 54# applied. 55 56# Flag to apply erratum 826319 workaround during reset. This erratum applies 57# only to revision <= r0p2 of the Cortex A53 cpu. 58ERRATA_A53_826319 ?=0 59 60# Flag to apply erratum 835769 workaround at compile and link time. This 61# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this 62# workaround can lead the linker to create "*.stub" sections. 63ERRATA_A53_835769 ?=0 64 65# Flag to apply erratum 836870 workaround during reset. This erratum applies 66# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this 67# erratum workaround is enabled by default in hardware. 68ERRATA_A53_836870 ?=0 69 70# Flag to apply erratum 843419 workaround at link time. 71# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this 72# workaround could lead the linker to emit "*.stub" sections which are 4kB 73# aligned. 74ERRATA_A53_843419 ?=0 75 76# Flag to apply errata 855873 during reset. This errata applies to all 77# revisions of the Cortex A53 CPU, but this firmware workaround only works 78# for revisions r0p3 and higher. Earlier revisions are taken care 79# of by the rich OS. 80ERRATA_A53_855873 ?=0 81 82# Flag to apply erratum 806969 workaround during reset. This erratum applies 83# only to revision r0p0 of the Cortex A57 cpu. 84ERRATA_A57_806969 ?=0 85 86# Flag to apply erratum 813419 workaround during reset. This erratum applies 87# only to revision r0p0 of the Cortex A57 cpu. 88ERRATA_A57_813419 ?=0 89 90# Flag to apply erratum 813420 workaround during reset. This erratum applies 91# only to revision r0p0 of the Cortex A57 cpu. 92ERRATA_A57_813420 ?=0 93 94# Flag to apply erratum 826974 workaround during reset. This erratum applies 95# only to revision <= r1p1 of the Cortex A57 cpu. 96ERRATA_A57_826974 ?=0 97 98# Flag to apply erratum 826977 workaround during reset. This erratum applies 99# only to revision <= r1p1 of the Cortex A57 cpu. 100ERRATA_A57_826977 ?=0 101 102# Flag to apply erratum 828024 workaround during reset. This erratum applies 103# only to revision <= r1p1 of the Cortex A57 cpu. 104ERRATA_A57_828024 ?=0 105 106# Flag to apply erratum 829520 workaround during reset. This erratum applies 107# only to revision <= r1p2 of the Cortex A57 cpu. 108ERRATA_A57_829520 ?=0 109 110# Flag to apply erratum 833471 workaround during reset. This erratum applies 111# only to revision <= r1p2 of the Cortex A57 cpu. 112ERRATA_A57_833471 ?=0 113 114# Flag to apply erratum 855972 workaround during reset. This erratum applies 115# only to revision <= r1p3 of the Cortex A57 cpu. 116ERRATA_A57_859972 ?=0 117 118# Flag to apply erratum 855971 workaround during reset. This erratum applies 119# only to revision <= r0p3 of the Cortex A72 cpu. 120ERRATA_A72_859971 ?=0 121 122# Flag to apply T32 CLREX workaround during reset. This erratum applies 123# only to r0p0 and r1p0 of the Ares cpu. 124ERRATA_ARES_1043202 ?=1 125 126# Process ERRATA_A53_826319 flag 127$(eval $(call assert_boolean,ERRATA_A53_826319)) 128$(eval $(call add_define,ERRATA_A53_826319)) 129 130# Process ERRATA_A53_835769 flag 131$(eval $(call assert_boolean,ERRATA_A53_835769)) 132$(eval $(call add_define,ERRATA_A53_835769)) 133 134# Process ERRATA_A53_836870 flag 135$(eval $(call assert_boolean,ERRATA_A53_836870)) 136$(eval $(call add_define,ERRATA_A53_836870)) 137 138# Process ERRATA_A53_843419 flag 139$(eval $(call assert_boolean,ERRATA_A53_843419)) 140$(eval $(call add_define,ERRATA_A53_843419)) 141 142# Process ERRATA_A53_855873 flag 143$(eval $(call assert_boolean,ERRATA_A53_855873)) 144$(eval $(call add_define,ERRATA_A53_855873)) 145 146# Process ERRATA_A57_806969 flag 147$(eval $(call assert_boolean,ERRATA_A57_806969)) 148$(eval $(call add_define,ERRATA_A57_806969)) 149 150# Process ERRATA_A57_813419 flag 151$(eval $(call assert_boolean,ERRATA_A57_813419)) 152$(eval $(call add_define,ERRATA_A57_813419)) 153 154# Process ERRATA_A57_813420 flag 155$(eval $(call assert_boolean,ERRATA_A57_813420)) 156$(eval $(call add_define,ERRATA_A57_813420)) 157 158# Process ERRATA_A57_826974 flag 159$(eval $(call assert_boolean,ERRATA_A57_826974)) 160$(eval $(call add_define,ERRATA_A57_826974)) 161 162# Process ERRATA_A57_826977 flag 163$(eval $(call assert_boolean,ERRATA_A57_826977)) 164$(eval $(call add_define,ERRATA_A57_826977)) 165 166# Process ERRATA_A57_828024 flag 167$(eval $(call assert_boolean,ERRATA_A57_828024)) 168$(eval $(call add_define,ERRATA_A57_828024)) 169 170# Process ERRATA_A57_829520 flag 171$(eval $(call assert_boolean,ERRATA_A57_829520)) 172$(eval $(call add_define,ERRATA_A57_829520)) 173 174# Process ERRATA_A57_833471 flag 175$(eval $(call assert_boolean,ERRATA_A57_833471)) 176$(eval $(call add_define,ERRATA_A57_833471)) 177 178# Process ERRATA_A57_859972 flag 179$(eval $(call assert_boolean,ERRATA_A57_859972)) 180$(eval $(call add_define,ERRATA_A57_859972)) 181 182# Process ERRATA_A72_859971 flag 183$(eval $(call assert_boolean,ERRATA_A72_859971)) 184$(eval $(call add_define,ERRATA_A72_859971)) 185 186# Process ERRATA_ARES_1043202 flag 187$(eval $(call assert_boolean,ERRATA_ARES_1043202)) 188$(eval $(call add_define,ERRATA_ARES_1043202)) 189 190# Errata build flags 191ifneq (${ERRATA_A53_843419},0) 192TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419 193endif 194 195ifneq (${ERRATA_A53_835769},0) 196TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769 197TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769 198endif 199