1 /* 2 * Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <libfdt.h> 10 #include <tc_plat.h> 11 12 #include <common/bl_common.h> 13 #include <common/debug.h> 14 #include <drivers/arm/css/css_mhu_doorbell.h> 15 #include <drivers/arm/css/scmi.h> 16 #include <drivers/arm/sbsa.h> 17 #include <lib/fconf/fconf.h> 18 #include <lib/fconf/fconf_dyn_cfg_getter.h> 19 #include <plat/arm/common/plat_arm.h> 20 #include <plat/common/platform.h> 21 22 static scmi_channel_plat_info_t tc_scmi_plat_info[] = { 23 { 24 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, 25 .db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0), 26 .db_preserve_mask = 0xfffffffe, 27 .db_modify_mask = 0x1, 28 .ring_doorbell = &mhuv2_ring_doorbell, 29 } 30 }; 31 32 void bl31_platform_setup(void) 33 { 34 tc_bl31_common_platform_setup(); 35 } 36 37 scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id) 38 { 39 40 return &tc_scmi_plat_info[channel_id]; 41 42 } 43 44 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 45 u_register_t arg2, u_register_t arg3) 46 { 47 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 48 49 /* Fill the properties struct with the info from the config dtb */ 50 fconf_populate("FW_CONFIG", arg1); 51 } 52 53 void tc_bl31_common_platform_setup(void) 54 { 55 arm_bl31_platform_setup(); 56 57 #if defined(PLATFORM_TEST_NV_COUNTERS) || defined(PLATFORM_TEST_TFM_TESTSUITE) 58 #ifdef PLATFORM_TEST_NV_COUNTERS 59 nv_counter_test(); 60 #elif PLATFORM_TEST_TFM_TESTSUITE 61 run_platform_tests(); 62 #endif 63 /* Suspend booting */ 64 plat_error_handler(-1); 65 #endif 66 } 67 68 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops) 69 { 70 return css_scmi_override_pm_ops(ops); 71 } 72 73 void __init bl31_plat_arch_setup(void) 74 { 75 arm_bl31_plat_arch_setup(); 76 77 /* HW_CONFIG was also loaded by BL2 */ 78 const struct dyn_cfg_dtb_info_t *hw_config_info; 79 80 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID); 81 assert(hw_config_info != NULL); 82 83 fconf_populate("HW_CONFIG", hw_config_info->config_addr); 84 } 85 86 #if defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1) 87 void tc_bl31_plat_runtime_setup(void) 88 { 89 arm_bl31_plat_runtime_setup(); 90 91 /* Start secure watchdog timer. */ 92 plat_arm_secure_wdt_start(); 93 } 94 95 void bl31_plat_runtime_setup(void) 96 { 97 tc_bl31_plat_runtime_setup(); 98 } 99 100 /* 101 * Platform handler for Group0 secure interrupt. 102 */ 103 int plat_spmd_handle_group0_interrupt(uint32_t intid) 104 { 105 /* Trusted Watchdog timer is the only source of Group0 interrupt now. */ 106 if (intid == SBSA_SECURE_WDOG_INTID) { 107 INFO("Watchdog restarted\n"); 108 /* Refresh the timer. */ 109 plat_arm_secure_wdt_refresh(); 110 111 /* Deactivate the corresponding interrupt. */ 112 plat_ic_end_of_interrupt(intid); 113 return 0; 114 } 115 116 return -1; 117 } 118 #endif /*defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1)*/ 119