1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <arch_helpers.h> 7 #include <bl_common.h> 8 #include <cci.h> 9 #include <console.h> 10 #include <debug.h> 11 #include <mmio.h> 12 #include <mtk_plat_common.h> 13 #include <mtk_sip_svc.h> 14 #include <plat_private.h> 15 #include <platform.h> 16 #include <xlat_tables.h> 17 18 struct atf_arg_t gteearg; 19 20 void clean_top_32b_of_param(uint32_t smc_fid, 21 u_register_t *px1, 22 u_register_t *px2, 23 u_register_t *px3, 24 u_register_t *px4) 25 { 26 /* if parameters from SMC32. Clean top 32 bits */ 27 if (0 == (smc_fid & SMC_AARCH64_BIT)) { 28 *px1 = *px1 & SMC32_PARAM_MASK; 29 *px2 = *px2 & SMC32_PARAM_MASK; 30 *px3 = *px3 & SMC32_PARAM_MASK; 31 *px4 = *px4 & SMC32_PARAM_MASK; 32 } 33 } 34 35 #if MTK_SIP_KERNEL_BOOT_ENABLE 36 static struct kernel_info k_info; 37 38 static void save_kernel_info(uint64_t pc, 39 uint64_t r0, 40 uint64_t r1, 41 uint64_t k32_64) 42 { 43 k_info.k32_64 = k32_64; 44 k_info.pc = pc; 45 46 if (LINUX_KERNEL_32 == k32_64) { 47 /* for 32 bits kernel */ 48 k_info.r0 = 0; 49 /* machtype */ 50 k_info.r1 = r0; 51 /* tags */ 52 k_info.r2 = r1; 53 } else { 54 /* for 64 bits kernel */ 55 k_info.r0 = r0; 56 k_info.r1 = r1; 57 } 58 } 59 60 uint64_t get_kernel_info_pc(void) 61 { 62 return k_info.pc; 63 } 64 65 uint64_t get_kernel_info_r0(void) 66 { 67 return k_info.r0; 68 } 69 70 uint64_t get_kernel_info_r1(void) 71 { 72 return k_info.r1; 73 } 74 75 uint64_t get_kernel_info_r2(void) 76 { 77 return k_info.r2; 78 } 79 80 void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4) 81 { 82 static uint8_t kernel_boot_once_flag; 83 /* only support in booting flow */ 84 if (0 == kernel_boot_once_flag) { 85 kernel_boot_once_flag = 1; 86 87 console_init(gteearg.atf_log_port, 88 UART_CLOCK, UART_BAUDRATE); 89 INFO("save kernel info\n"); 90 save_kernel_info(x1, x2, x3, x4); 91 bl31_prepare_kernel_entry(x4); 92 INFO("el3_exit\n"); 93 console_uninit(); 94 } 95 } 96 #endif 97 98 uint32_t plat_get_spsr_for_bl33_entry(void) 99 { 100 unsigned int mode; 101 uint32_t spsr; 102 unsigned int ee; 103 unsigned long daif; 104 105 INFO("Secondary bootloader is AArch32\n"); 106 mode = MODE32_svc; 107 ee = 0; 108 /* 109 * TODO: Choose async. exception bits if HYP mode is not 110 * implemented according to the values of SCR.{AW, FW} bits 111 */ 112 daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT; 113 114 spsr = SPSR_MODE32(mode, 0, ee, daif); 115 return spsr; 116 } 117