1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <bl_common.h> 8 #include <gicv2.h> 9 #include <interrupt_props.h> 10 #include <platform_def.h> 11 #include <utils.h> 12 13 /****************************************************************************** 14 * The following functions are defined as weak to allow a platform to override 15 * the way the GICv2 driver is initialised and used. 16 *****************************************************************************/ 17 #pragma weak plat_rockchip_gic_driver_init 18 #pragma weak plat_rockchip_gic_init 19 #pragma weak plat_rockchip_gic_cpuif_enable 20 #pragma weak plat_rockchip_gic_cpuif_disable 21 #pragma weak plat_rockchip_gic_pcpu_init 22 23 /****************************************************************************** 24 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 25 * interrupts. 26 *****************************************************************************/ 27 static const interrupt_prop_t g0_interrupt_props[] = { 28 PLAT_RK_GICV2_G1S_IRQS 29 }; 30 31 /* 32 * Ideally `rockchip_gic_data` structure definition should be a `const` but it 33 * is kept as modifiable for overwriting with different GICD and GICC base when 34 * running on FVP with VE memory map. 35 */ 36 gicv2_driver_data_t rockchip_gic_data = { 37 .gicd_base = PLAT_RK_GICD_BASE, 38 .gicc_base = PLAT_RK_GICC_BASE, 39 .interrupt_props = g0_interrupt_props, 40 .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props), 41 }; 42 43 /****************************************************************************** 44 * RockChip common helper to initialize the GICv2 only driver. 45 *****************************************************************************/ 46 void plat_rockchip_gic_driver_init(void) 47 { 48 gicv2_driver_init(&rockchip_gic_data); 49 } 50 51 void plat_rockchip_gic_init(void) 52 { 53 gicv2_distif_init(); 54 gicv2_pcpu_distif_init(); 55 gicv2_cpuif_enable(); 56 } 57 58 /****************************************************************************** 59 * RockChip common helper to enable the GICv2 CPU interface 60 *****************************************************************************/ 61 void plat_rockchip_gic_cpuif_enable(void) 62 { 63 gicv2_cpuif_enable(); 64 } 65 66 /****************************************************************************** 67 * RockChip common helper to disable the GICv2 CPU interface 68 *****************************************************************************/ 69 void plat_rockchip_gic_cpuif_disable(void) 70 { 71 gicv2_cpuif_disable(); 72 } 73 74 /****************************************************************************** 75 * RockChip common helper to initialize the per cpu distributor interface 76 * in GICv2 77 *****************************************************************************/ 78 void plat_rockchip_gic_pcpu_init(void) 79 { 80 gicv2_pcpu_distif_init(); 81 } 82