1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <arm_def.h> 10 #include <assert.h> 11 #include <bl_common.h> 12 #include <console.h> 13 #include <debug.h> 14 #include <mmio.h> 15 #include <plat_arm.h> 16 #include <platform.h> 17 #include <ras.h> 18 #include <utils.h> 19 #include <xlat_tables_compat.h> 20 21 /* 22 * Placeholder variables for copying the arguments that have been passed to 23 * BL31 from BL2. 24 */ 25 static entry_point_info_t bl32_image_ep_info; 26 static entry_point_info_t bl33_image_ep_info; 27 28 #if !RESET_TO_BL31 29 /* 30 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page 31 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2. 32 */ 33 CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows); 34 #endif 35 36 /* Weak definitions may be overridden in specific ARM standard platform */ 37 #pragma weak bl31_early_platform_setup2 38 #pragma weak bl31_platform_setup 39 #pragma weak bl31_plat_arch_setup 40 #pragma weak bl31_plat_get_next_image_ep_info 41 42 #define MAP_BL31_TOTAL MAP_REGION_FLAT( \ 43 BL31_START, \ 44 BL31_END - BL31_START, \ 45 MT_MEMORY | MT_RW | MT_SECURE) 46 #if RECLAIM_INIT_CODE 47 IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE); 48 IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END); 49 50 #define MAP_BL_INIT_CODE MAP_REGION_FLAT( \ 51 BL_INIT_CODE_BASE, \ 52 BL_INIT_CODE_END \ 53 - BL_INIT_CODE_BASE, \ 54 MT_CODE | MT_SECURE) 55 #endif 56 57 /******************************************************************************* 58 * Return a pointer to the 'entry_point_info' structure of the next image for the 59 * security state specified. BL33 corresponds to the non-secure image type 60 * while BL32 corresponds to the secure image type. A NULL pointer is returned 61 * if the image does not exist. 62 ******************************************************************************/ 63 struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type) 64 { 65 entry_point_info_t *next_image_info; 66 67 assert(sec_state_is_valid(type)); 68 next_image_info = (type == NON_SECURE) 69 ? &bl33_image_ep_info : &bl32_image_ep_info; 70 /* 71 * None of the images on the ARM development platforms can have 0x0 72 * as the entrypoint 73 */ 74 if (next_image_info->pc) 75 return next_image_info; 76 else 77 return NULL; 78 } 79 80 /******************************************************************************* 81 * Perform any BL31 early platform setup common to ARM standard platforms. 82 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 83 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be 84 * done before the MMU is initialized so that the memory layout can be used 85 * while creating page tables. BL2 has flushed this information to memory, so 86 * we are guaranteed to pick up good data. 87 ******************************************************************************/ 88 void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, 89 uintptr_t hw_config, void *plat_params_from_bl2) 90 { 91 /* Initialize the console to provide early debug support */ 92 arm_console_boot_init(); 93 94 #if RESET_TO_BL31 95 /* There are no parameters from BL2 if BL31 is a reset vector */ 96 assert(from_bl2 == NULL); 97 assert(plat_params_from_bl2 == NULL); 98 99 # ifdef BL32_BASE 100 /* Populate entry point information for BL32 */ 101 SET_PARAM_HEAD(&bl32_image_ep_info, 102 PARAM_EP, 103 VERSION_1, 104 0); 105 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 106 bl32_image_ep_info.pc = BL32_BASE; 107 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); 108 # endif /* BL32_BASE */ 109 110 /* Populate entry point information for BL33 */ 111 SET_PARAM_HEAD(&bl33_image_ep_info, 112 PARAM_EP, 113 VERSION_1, 114 0); 115 /* 116 * Tell BL31 where the non-trusted software image 117 * is located and the entry state information 118 */ 119 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); 120 121 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); 122 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 123 124 # if ARM_LINUX_KERNEL_AS_BL33 125 /* 126 * According to the file ``Documentation/arm64/booting.txt`` of the 127 * Linux kernel tree, Linux expects the physical address of the device 128 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 129 * must be 0. 130 */ 131 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; 132 bl33_image_ep_info.args.arg1 = 0U; 133 bl33_image_ep_info.args.arg2 = 0U; 134 bl33_image_ep_info.args.arg3 = 0U; 135 # endif 136 137 #else /* RESET_TO_BL31 */ 138 139 /* 140 * In debug builds, we pass a special value in 'plat_params_from_bl2' 141 * to verify platform parameters from BL2 to BL31. 142 * In release builds, it's not used. 143 */ 144 assert(((unsigned long long)plat_params_from_bl2) == 145 ARM_BL31_PLAT_PARAM_VAL); 146 147 /* 148 * Check params passed from BL2 should not be NULL, 149 */ 150 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; 151 assert(params_from_bl2 != NULL); 152 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 153 assert(params_from_bl2->h.version >= VERSION_2); 154 155 bl_params_node_t *bl_params = params_from_bl2->head; 156 157 /* 158 * Copy BL33 and BL32 (if present), entry point information. 159 * They are stored in Secure RAM, in BL2's address space. 160 */ 161 while (bl_params != NULL) { 162 if (bl_params->image_id == BL32_IMAGE_ID) 163 bl32_image_ep_info = *bl_params->ep_info; 164 165 if (bl_params->image_id == BL33_IMAGE_ID) 166 bl33_image_ep_info = *bl_params->ep_info; 167 168 bl_params = bl_params->next_params_info; 169 } 170 171 if (bl33_image_ep_info.pc == 0U) 172 panic(); 173 #endif /* RESET_TO_BL31 */ 174 } 175 176 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 177 u_register_t arg2, u_register_t arg3) 178 { 179 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 180 181 /* 182 * Initialize Interconnect for this cluster during cold boot. 183 * No need for locks as no other CPU is active. 184 */ 185 plat_arm_interconnect_init(); 186 187 /* 188 * Enable Interconnect coherency for the primary CPU's cluster. 189 * Earlier bootloader stages might already do this (e.g. Trusted 190 * Firmware's BL1 does it) but we can't assume so. There is no harm in 191 * executing this code twice anyway. 192 * Platform specific PSCI code will enable coherency for other 193 * clusters. 194 */ 195 plat_arm_interconnect_enter_coherency(); 196 } 197 198 /******************************************************************************* 199 * Perform any BL31 platform setup common to ARM standard platforms 200 ******************************************************************************/ 201 void arm_bl31_platform_setup(void) 202 { 203 /* Initialize the GIC driver, cpu and distributor interfaces */ 204 plat_arm_gic_driver_init(); 205 plat_arm_gic_init(); 206 207 #if RESET_TO_BL31 208 /* 209 * Do initial security configuration to allow DRAM/device access 210 * (if earlier BL has not already done so). 211 */ 212 plat_arm_security_setup(); 213 214 #if defined(PLAT_ARM_MEM_PROT_ADDR) 215 arm_nor_psci_do_dyn_mem_protect(); 216 #endif /* PLAT_ARM_MEM_PROT_ADDR */ 217 218 #endif /* RESET_TO_BL31 */ 219 220 /* Enable and initialize the System level generic timer */ 221 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, 222 CNTCR_FCREQ(0U) | CNTCR_EN); 223 224 /* Allow access to the System counter timer module */ 225 arm_configure_sys_timer(); 226 227 /* Initialize power controller before setting up topology */ 228 plat_arm_pwrc_setup(); 229 230 #if RAS_EXTENSION 231 ras_init(); 232 #endif 233 } 234 235 /******************************************************************************* 236 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM 237 * standard platforms 238 * Perform BL31 platform setup 239 ******************************************************************************/ 240 void arm_bl31_plat_runtime_setup(void) 241 { 242 #if MULTI_CONSOLE_API 243 console_switch_state(CONSOLE_FLAG_RUNTIME); 244 #else 245 console_uninit(); 246 #endif 247 248 /* Initialize the runtime console */ 249 arm_console_runtime_init(); 250 #if RECLAIM_INIT_CODE 251 arm_free_init_memory(); 252 #endif 253 } 254 255 #if RECLAIM_INIT_CODE 256 /* 257 * Zero out and make RW memory used to store image boot time code so it can 258 * be reclaimed during runtime 259 */ 260 void arm_free_init_memory(void) 261 { 262 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE, 263 BL_INIT_CODE_END - BL_INIT_CODE_BASE, 264 MT_RW_DATA); 265 266 if (ret != 0) { 267 ERROR("Could not reclaim initialization code"); 268 panic(); 269 } 270 } 271 #endif 272 273 void __init bl31_platform_setup(void) 274 { 275 arm_bl31_platform_setup(); 276 } 277 278 void bl31_plat_runtime_setup(void) 279 { 280 arm_bl31_plat_runtime_setup(); 281 } 282 283 /******************************************************************************* 284 * Perform the very early platform specific architectural setup shared between 285 * ARM standard platforms. This only does basic initialization. Later 286 * architectural setup (bl31_arch_setup()) does not do anything platform 287 * specific. 288 ******************************************************************************/ 289 void __init arm_bl31_plat_arch_setup(void) 290 { 291 const mmap_region_t bl_regions[] = { 292 MAP_BL31_TOTAL, 293 #if RECLAIM_INIT_CODE 294 MAP_BL_INIT_CODE, 295 #endif 296 ARM_MAP_BL_RO, 297 #if USE_ROMLIB 298 ARM_MAP_ROMLIB_CODE, 299 ARM_MAP_ROMLIB_DATA, 300 #endif 301 #if USE_COHERENT_MEM 302 ARM_MAP_BL_COHERENT_RAM, 303 #endif 304 {0} 305 }; 306 307 setup_page_tables(bl_regions, plat_arm_get_mmap()); 308 309 enable_mmu_el3(0); 310 311 arm_setup_romlib(); 312 } 313 314 void __init bl31_plat_arch_setup(void) 315 { 316 arm_bl31_plat_arch_setup(); 317 } 318