xref: /rk3399_ARM-atf/include/arch/aarch64/arch_features.h (revision 1b491eead580d7849a45a38f2c6a935a5d8d1160) 
1 /*
2  * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ARCH_FEATURES_H
8 #define ARCH_FEATURES_H
9 
10 #include <stdbool.h>
11 
12 #include <arch_helpers.h>
13 #include <common/feat_detect.h>
14 
15 #define ISOLATE_FIELD(reg, feat)					\
16 	((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK)))
17 
18 static inline bool is_armv7_gentimer_present(void)
19 {
20 	/* The Generic Timer is always present in an ARMv8-A implementation */
21 	return true;
22 }
23 
24 static inline unsigned int read_feat_pan_id_field(void)
25 {
26 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN);
27 }
28 
29 static inline bool is_feat_pan_supported(void)
30 {
31 	if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) {
32 		return false;
33 	}
34 
35 	if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) {
36 		return true;
37 	}
38 
39 	return read_feat_pan_id_field() != 0U;
40 }
41 
42 static inline unsigned int read_feat_vhe_id_field(void)
43 {
44 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE);
45 }
46 
47 static inline bool is_feat_vhe_supported(void)
48 {
49 	if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) {
50 		return false;
51 	}
52 
53 	if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) {
54 		return true;
55 	}
56 
57 	return read_feat_vhe_id_field() != 0U;
58 }
59 
60 static inline bool is_armv8_2_ttcnp_present(void)
61 {
62 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
63 		ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
64 }
65 
66 static inline bool is_feat_pacqarma3_present(void)
67 {
68 	uint64_t mask_id_aa64isar2 =
69 			(ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
70 			(ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
71 
72 	/* If any of the fields is not zero, QARMA3 algorithm is present */
73 	return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
74 }
75 
76 static inline bool is_armv8_3_pauth_present(void)
77 {
78 	uint64_t mask_id_aa64isar1 =
79 		(ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
80 		(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
81 		(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
82 		(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
83 
84 	/*
85 	 * If any of the fields is not zero or QARMA3 is present,
86 	 * PAuth is present
87 	 */
88 	return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
89 		is_feat_pacqarma3_present());
90 }
91 
92 static inline bool is_armv8_4_ttst_present(void)
93 {
94 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
95 		ID_AA64MMFR2_EL1_ST_MASK) == 1U;
96 }
97 
98 static inline bool is_armv8_5_bti_present(void)
99 {
100 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
101 		ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
102 }
103 
104 static inline unsigned int get_armv8_5_mte_support(void)
105 {
106 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
107 		ID_AA64PFR1_EL1_MTE_MASK);
108 }
109 
110 static inline unsigned int read_feat_sel2_id_field(void)
111 {
112 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2);
113 }
114 
115 static inline bool is_feat_sel2_supported(void)
116 {
117 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) {
118 		return false;
119 	}
120 
121 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) {
122 		return true;
123 	}
124 
125 	return read_feat_sel2_id_field() != 0U;
126 }
127 
128 static inline unsigned int read_feat_twed_id_field(void)
129 {
130 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED);
131 }
132 
133 static inline bool is_feat_twed_supported(void)
134 {
135 	if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) {
136 		return false;
137 	}
138 
139 	if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) {
140 		return true;
141 	}
142 
143 	return read_feat_twed_id_field() != 0U;
144 }
145 
146 static unsigned int read_feat_fgt_id_field(void)
147 {
148 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT);
149 }
150 
151 static inline bool is_feat_fgt_supported(void)
152 {
153 	if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
154 		return false;
155 	}
156 
157 	if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
158 		return true;
159 	}
160 
161 	return read_feat_fgt_id_field() != 0U;
162 }
163 
164 static unsigned int read_feat_ecv_id_field(void)
165 {
166 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV);
167 }
168 
169 static inline bool is_feat_ecv_supported(void)
170 {
171 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
172 		return false;
173 	}
174 
175 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
176 		return true;
177 	}
178 
179 	return read_feat_ecv_id_field() != 0U;
180 }
181 
182 static inline bool is_feat_ecv_v2_supported(void)
183 {
184 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
185 		return false;
186 	}
187 
188 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
189 		return true;
190 	}
191 
192 	return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH;
193 }
194 
195 static unsigned int read_feat_rng_id_field(void)
196 {
197 	return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR);
198 }
199 
200 static inline bool is_feat_rng_supported(void)
201 {
202 	if (ENABLE_FEAT_RNG == FEAT_STATE_DISABLED) {
203 		return false;
204 	}
205 
206 	if (ENABLE_FEAT_RNG == FEAT_STATE_ALWAYS) {
207 		return true;
208 	}
209 
210 	return read_feat_rng_id_field() != 0U;
211 }
212 
213 static unsigned int read_feat_tcrx_id_field(void)
214 {
215 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX);
216 }
217 
218 static inline bool is_feat_tcr2_supported(void)
219 {
220 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) {
221 		return false;
222 	}
223 
224 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) {
225 		return true;
226 	}
227 
228 	return read_feat_tcrx_id_field() != 0U;
229 }
230 
231 static unsigned int read_feat_s2poe_id_field(void)
232 {
233 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2POE);
234 }
235 
236 static inline bool is_feat_s2poe_supported(void)
237 {
238 	if (ENABLE_FEAT_S2POE == FEAT_STATE_DISABLED) {
239 		return false;
240 	}
241 
242 	if (ENABLE_FEAT_S2POE == FEAT_STATE_ALWAYS) {
243 		return true;
244 	}
245 
246 	return read_feat_s2poe_id_field() != 0U;
247 }
248 
249 static unsigned int read_feat_s1poe_id_field(void)
250 {
251 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1POE);
252 }
253 
254 static inline bool is_feat_s1poe_supported(void)
255 {
256 	if (ENABLE_FEAT_S1POE == FEAT_STATE_DISABLED) {
257 		return false;
258 	}
259 
260 	if (ENABLE_FEAT_S1POE == FEAT_STATE_ALWAYS) {
261 		return true;
262 	}
263 
264 	return read_feat_s1poe_id_field() != 0U;
265 }
266 
267 static inline bool is_feat_sxpoe_supported(void)
268 {
269 	return is_feat_s1poe_supported() || is_feat_s2poe_supported();
270 }
271 
272 static unsigned int read_feat_s2pie_id_field(void)
273 {
274 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2PIE);
275 }
276 
277 static inline bool is_feat_s2pie_supported(void)
278 {
279 	if (ENABLE_FEAT_S2PIE == FEAT_STATE_DISABLED) {
280 		return false;
281 	}
282 
283 	if (ENABLE_FEAT_S2PIE == FEAT_STATE_ALWAYS) {
284 		return true;
285 	}
286 
287 	return read_feat_s2pie_id_field() != 0U;
288 }
289 
290 static unsigned int read_feat_s1pie_id_field(void)
291 {
292 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1PIE);
293 }
294 
295 static inline bool is_feat_s1pie_supported(void)
296 {
297 	if (ENABLE_FEAT_S1PIE == FEAT_STATE_DISABLED) {
298 		return false;
299 	}
300 
301 	if (ENABLE_FEAT_S1PIE == FEAT_STATE_ALWAYS) {
302 		return true;
303 	}
304 
305 	return read_feat_s1pie_id_field() != 0U;
306 }
307 
308 static inline bool is_feat_sxpie_supported(void)
309 {
310 	return is_feat_s1pie_supported() || is_feat_s2pie_supported();
311 }
312 
313 static unsigned int read_feat_gcs_id_field(void)
314 {
315 	return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_GCS);
316 }
317 
318 static inline bool is_feat_gcs_supported(void)
319 {
320 	if (ENABLE_FEAT_GCS == FEAT_STATE_DISABLED) {
321 		return false;
322 	}
323 
324 	if (ENABLE_FEAT_GCS == FEAT_STATE_ALWAYS) {
325 		return true;
326 	}
327 
328 	return read_feat_gcs_id_field() != 0U;
329 }
330 
331 /*******************************************************************************
332  * Functions to identify the presence of the Activity Monitors Extension
333  ******************************************************************************/
334 static unsigned int read_feat_amu_id_field(void)
335 {
336 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU);
337 }
338 
339 static inline bool is_feat_amu_supported(void)
340 {
341 	if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) {
342 		return false;
343 	}
344 
345 	if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) {
346 		return true;
347 	}
348 
349 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
350 }
351 
352 static inline bool is_feat_amuv1p1_supported(void)
353 {
354 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_DISABLED) {
355 		return false;
356 	}
357 
358 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_ALWAYS) {
359 		return true;
360 	}
361 
362 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
363 }
364 
365 /*
366  * Return MPAM version:
367  *
368  * 0x00: None Armv8.0 or later
369  * 0x01: v0.1 Armv8.4 or later
370  * 0x10: v1.0 Armv8.2 or later
371  * 0x11: v1.1 Armv8.4 or later
372  *
373  */
374 static inline unsigned int read_feat_mpam_version(void)
375 {
376 	return (unsigned int)((((read_id_aa64pfr0_el1() >>
377 		ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
378 				((read_id_aa64pfr1_el1() >>
379 		ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
380 }
381 
382 static inline bool is_feat_mpam_supported(void)
383 {
384 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) {
385 		return false;
386 	}
387 
388 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) {
389 		return true;
390 	}
391 
392 	return read_feat_mpam_version() != 0U;
393 }
394 
395 static inline unsigned int read_feat_hcx_id_field(void)
396 {
397 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX);
398 }
399 
400 static inline bool is_feat_hcx_supported(void)
401 {
402 	if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
403 		return false;
404 	}
405 
406 	if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
407 		return true;
408 	}
409 
410 	return read_feat_hcx_id_field() != 0U;
411 }
412 
413 static inline bool is_feat_rng_trap_present(void)
414 {
415 	return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
416 			ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
417 			== ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
418 }
419 
420 static inline unsigned int get_armv9_2_feat_rme_support(void)
421 {
422 	/*
423 	 * Return the RME version, zero if not supported.  This function can be
424 	 * used as both an integer value for the RME version or compared to zero
425 	 * to detect RME presence.
426 	 */
427 	return (unsigned int)(read_id_aa64pfr0_el1() >>
428 		ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
429 }
430 
431 /*********************************************************************************
432  * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
433  ********************************************************************************/
434 static inline unsigned int read_feat_sb_id_field(void)
435 {
436 	return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB);
437 }
438 
439 /*********************************************************************************
440  * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
441  ********************************************************************************/
442 static inline unsigned int read_feat_csv2_id_field(void)
443 {
444 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2);
445 }
446 
447 static inline bool is_feat_csv2_2_supported(void)
448 {
449 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) {
450 		return false;
451 	}
452 
453 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) {
454 		return true;
455 	}
456 
457 	return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED;
458 }
459 
460 /**********************************************************************************
461  * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
462  *********************************************************************************/
463 static inline unsigned int read_feat_spe_id_field(void)
464 {
465 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS);
466 }
467 
468 static inline bool is_feat_spe_supported(void)
469 {
470 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) {
471 		return false;
472 	}
473 
474 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) {
475 		return true;
476 	}
477 
478 	return read_feat_spe_id_field() != 0U;
479 }
480 
481 /*******************************************************************************
482  * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
483  ******************************************************************************/
484 static inline unsigned int read_feat_sve_id_field(void)
485 {
486 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SVE);
487 }
488 
489 static inline bool is_feat_sve_supported(void)
490 {
491 	if (ENABLE_SVE_FOR_NS == FEAT_STATE_DISABLED) {
492 		return false;
493 	}
494 
495 	if (ENABLE_SVE_FOR_NS == FEAT_STATE_ALWAYS) {
496 		return true;
497 	}
498 
499 	return read_feat_sve_id_field() >= ID_AA64PFR0_SVE_SUPPORTED;
500 }
501 
502 /*******************************************************************************
503  * Function to identify the presence of FEAT_RAS (Reliability,Availability,
504  * and Serviceability Extension)
505  ******************************************************************************/
506 static inline bool is_armv8_2_feat_ras_present(void)
507 {
508 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
509 		ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
510 }
511 
512 static unsigned int read_feat_dit_id_field(void)
513 {
514 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_DIT);
515 }
516 
517 static inline bool is_feat_dit_supported(void)
518 {
519 	if (ENABLE_FEAT_DIT == FEAT_STATE_DISABLED) {
520 		return false;
521 	}
522 
523 	if (ENABLE_FEAT_DIT == FEAT_STATE_ALWAYS) {
524 		return true;
525 	}
526 
527 	return read_feat_dit_id_field() != 0U;
528 }
529 
530 static inline unsigned int read_feat_tracever_id_field(void)
531 {
532 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER);
533 }
534 
535 static inline bool is_feat_sys_reg_trace_supported(void)
536 {
537 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) {
538 		return false;
539 	}
540 
541 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) {
542 		return true;
543 	}
544 
545 	return read_feat_tracever_id_field() != 0U;
546 }
547 
548 /*************************************************************************
549  * Function to identify the presence of FEAT_TRF (TraceLift)
550  ************************************************************************/
551 static inline unsigned int read_feat_trf_id_field(void)
552 {
553 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT);
554 }
555 
556 static inline bool is_feat_trf_supported(void)
557 {
558 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) {
559 		return false;
560 	}
561 
562 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) {
563 		return true;
564 	}
565 
566 	return read_feat_trf_id_field() != 0U;
567 }
568 
569 /********************************************************************************
570  * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
571  * Support)
572  *******************************************************************************/
573 static inline unsigned int read_feat_nv_id_field(void)
574 {
575 	return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV);
576 }
577 
578 static inline bool is_feat_nv2_supported(void)
579 {
580 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) {
581 		return false;
582 	}
583 
584 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) {
585 		return true;
586 	}
587 
588 	return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED;
589 }
590 
591 /*******************************************************************************
592  * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
593  * Extension)
594  ******************************************************************************/
595 static inline unsigned int read_feat_brbe_id_field(void)
596 {
597 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE);
598 }
599 
600 static inline bool is_feat_brbe_supported(void)
601 {
602 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) {
603 		return false;
604 	}
605 
606 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) {
607 		return true;
608 	}
609 
610 	return read_feat_brbe_id_field() != 0U;
611 }
612 
613 /*******************************************************************************
614  * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
615  ******************************************************************************/
616 static inline unsigned int read_feat_trbe_id_field(void)
617 {
618 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
619 }
620 
621 static inline bool is_feat_trbe_supported(void)
622 {
623 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
624 		return false;
625 	}
626 
627 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
628 		return true;
629 	}
630 
631 	return read_feat_trbe_id_field() != 0U;
632 
633 }
634 /*******************************************************************************
635  * Function to identify the presence of FEAT_SMEx (Scalar Matrix Extension)
636  ******************************************************************************/
637 static inline unsigned int read_feat_sme_fa64_id_field(void)
638 {
639 	return ISOLATE_FIELD(read_id_aa64smfr0_el1(), ID_AA64SMFR0_EL1_SME_FA64);
640 }
641 
642 static inline unsigned int read_feat_sme_id_field(void)
643 {
644 	return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME);
645 }
646 
647 static inline bool is_feat_sme_supported(void)
648 {
649 	if (ENABLE_SME_FOR_NS == FEAT_STATE_DISABLED) {
650 		return false;
651 	}
652 
653 	if (ENABLE_SME_FOR_NS == FEAT_STATE_ALWAYS) {
654 		return true;
655 	}
656 
657 	return read_feat_sme_id_field() >= ID_AA64PFR1_EL1_SME_SUPPORTED;
658 }
659 
660 static inline bool is_feat_sme2_supported(void)
661 {
662 	if (ENABLE_SME2_FOR_NS == FEAT_STATE_DISABLED) {
663 		return false;
664 	}
665 
666 	if (ENABLE_SME2_FOR_NS == FEAT_STATE_ALWAYS) {
667 		return true;
668 	}
669 
670 	return read_feat_sme_id_field() >= ID_AA64PFR1_EL1_SME2_SUPPORTED;
671 }
672 
673 #endif /* ARCH_FEATURES_H */
674