1 /* 2 * Copyright (c) 2021-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch_features.h> 15 #include <bl31/bl31.h> 16 #include <common/debug.h> 17 #include <common/runtime_svc.h> 18 #include <context.h> 19 #include <lib/el3_runtime/context_mgmt.h> 20 #include <lib/el3_runtime/pubsub.h> 21 #include <lib/gpt_rme/gpt_rme.h> 22 23 #include <lib/spinlock.h> 24 #include <lib/utils.h> 25 #include <lib/xlat_tables/xlat_tables_v2.h> 26 #include <plat/common/common_def.h> 27 #include <plat/common/platform.h> 28 #include <platform_def.h> 29 #include <services/rmmd_svc.h> 30 #include <smccc_helpers.h> 31 #include <lib/extensions/sve.h> 32 #include "rmmd_initial_context.h" 33 #include "rmmd_private.h" 34 35 /******************************************************************************* 36 * RMM boot failure flag 37 ******************************************************************************/ 38 static bool rmm_boot_failed; 39 40 /******************************************************************************* 41 * RMM context information. 42 ******************************************************************************/ 43 rmmd_rmm_context_t rmm_context[PLATFORM_CORE_COUNT]; 44 45 /******************************************************************************* 46 * RMM entry point information. Discovered on the primary core and reused 47 * on secondary cores. 48 ******************************************************************************/ 49 static entry_point_info_t *rmm_ep_info; 50 51 /******************************************************************************* 52 * Static function declaration. 53 ******************************************************************************/ 54 static int32_t rmm_init(void); 55 56 /******************************************************************************* 57 * This function takes an RMM context pointer and performs a synchronous entry 58 * into it. 59 ******************************************************************************/ 60 uint64_t rmmd_rmm_sync_entry(rmmd_rmm_context_t *rmm_ctx) 61 { 62 uint64_t rc; 63 64 assert(rmm_ctx != NULL); 65 66 cm_set_context(&(rmm_ctx->cpu_ctx), REALM); 67 68 /* Restore the realm context assigned above */ 69 cm_el1_sysregs_context_restore(REALM); 70 cm_el2_sysregs_context_restore(REALM); 71 cm_set_next_eret_context(REALM); 72 73 /* Enter RMM */ 74 rc = rmmd_rmm_enter(&rmm_ctx->c_rt_ctx); 75 76 /* 77 * Save realm context. EL1 and EL2 Non-secure 78 * contexts will be restored before exiting to 79 * Non-secure world, therefore there is no need 80 * to clear EL1 and EL2 context registers. 81 */ 82 cm_el1_sysregs_context_save(REALM); 83 cm_el2_sysregs_context_save(REALM); 84 85 return rc; 86 } 87 88 /******************************************************************************* 89 * This function returns to the place where rmmd_rmm_sync_entry() was 90 * called originally. 91 ******************************************************************************/ 92 __dead2 void rmmd_rmm_sync_exit(uint64_t rc) 93 { 94 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 95 96 /* Get context of the RMM in use by this CPU. */ 97 assert(cm_get_context(REALM) == &(ctx->cpu_ctx)); 98 99 /* 100 * The RMMD must have initiated the original request through a 101 * synchronous entry into RMM. Jump back to the original C runtime 102 * context with the value of rc in x0; 103 */ 104 rmmd_rmm_exit(ctx->c_rt_ctx, rc); 105 106 panic(); 107 } 108 109 static void rmm_el2_context_init(el2_sysregs_t *regs) 110 { 111 regs->ctx_regs[CTX_SPSR_EL2 >> 3] = REALM_SPSR_EL2; 112 regs->ctx_regs[CTX_SCTLR_EL2 >> 3] = SCTLR_EL2_RES1; 113 } 114 115 /******************************************************************************* 116 * Enable architecture extensions on first entry to Realm world. 117 ******************************************************************************/ 118 static void manage_extensions_realm(cpu_context_t *ctx) 119 { 120 if (is_feat_sve_supported()) { 121 /* 122 * Enable SVE and FPU in realm context when it is enabled for NS. 123 * Realm manager must ensure that the SVE and FPU register 124 * contexts are properly managed. 125 */ 126 sve_enable(ctx); 127 } 128 } 129 130 /******************************************************************************* 131 * Jump to the RMM for the first time. 132 ******************************************************************************/ 133 static int32_t rmm_init(void) 134 { 135 long rc; 136 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 137 138 INFO("RMM init start.\n"); 139 140 /* Enable architecture extensions */ 141 manage_extensions_realm(&ctx->cpu_ctx); 142 143 /* Initialize RMM EL2 context. */ 144 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 145 146 rc = rmmd_rmm_sync_entry(ctx); 147 if (rc != E_RMM_BOOT_SUCCESS) { 148 ERROR("RMM init failed: %ld\n", rc); 149 /* Mark the boot as failed for all the CPUs */ 150 rmm_boot_failed = true; 151 return 0; 152 } 153 154 INFO("RMM init end.\n"); 155 156 return 1; 157 } 158 159 /******************************************************************************* 160 * Load and read RMM manifest, setup RMM. 161 ******************************************************************************/ 162 int rmmd_setup(void) 163 { 164 size_t shared_buf_size __unused; 165 uintptr_t shared_buf_base; 166 uint32_t ep_attr; 167 unsigned int linear_id = plat_my_core_pos(); 168 rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id]; 169 struct rmm_manifest *manifest; 170 int rc; 171 172 /* Make sure RME is supported. */ 173 assert(get_armv9_2_feat_rme_support() != 0U); 174 175 rmm_ep_info = bl31_plat_get_next_image_ep_info(REALM); 176 if (rmm_ep_info == NULL) { 177 WARN("No RMM image provided by BL2 boot loader, Booting " 178 "device without RMM initialization. SMCs destined for " 179 "RMM will return SMC_UNK\n"); 180 return -ENOENT; 181 } 182 183 /* Under no circumstances will this parameter be 0 */ 184 assert(rmm_ep_info->pc == RMM_BASE); 185 186 /* Initialise an entrypoint to set up the CPU context */ 187 ep_attr = EP_REALM; 188 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) { 189 ep_attr |= EP_EE_BIG; 190 } 191 192 SET_PARAM_HEAD(rmm_ep_info, PARAM_EP, VERSION_1, ep_attr); 193 rmm_ep_info->spsr = SPSR_64(MODE_EL2, 194 MODE_SP_ELX, 195 DISABLE_ALL_EXCEPTIONS); 196 197 shared_buf_size = 198 plat_rmmd_get_el3_rmm_shared_mem(&shared_buf_base); 199 200 assert((shared_buf_size == SZ_4K) && 201 ((void *)shared_buf_base != NULL)); 202 203 /* Load the boot manifest at the beginning of the shared area */ 204 manifest = (struct rmm_manifest *)shared_buf_base; 205 rc = plat_rmmd_load_manifest(manifest); 206 if (rc != 0) { 207 ERROR("Error loading RMM Boot Manifest (%i)\n", rc); 208 return rc; 209 } 210 flush_dcache_range((uintptr_t)shared_buf_base, shared_buf_size); 211 212 /* 213 * Prepare coldboot arguments for RMM: 214 * arg0: This CPUID (primary processor). 215 * arg1: Version for this Boot Interface. 216 * arg2: PLATFORM_CORE_COUNT. 217 * arg3: Base address for the EL3 <-> RMM shared area. The boot 218 * manifest will be stored at the beginning of this area. 219 */ 220 rmm_ep_info->args.arg0 = linear_id; 221 rmm_ep_info->args.arg1 = RMM_EL3_INTERFACE_VERSION; 222 rmm_ep_info->args.arg2 = PLATFORM_CORE_COUNT; 223 rmm_ep_info->args.arg3 = shared_buf_base; 224 225 /* Initialise RMM context with this entry point information */ 226 cm_setup_context(&rmm_ctx->cpu_ctx, rmm_ep_info); 227 228 INFO("RMM setup done.\n"); 229 230 /* Register init function for deferred init. */ 231 bl31_register_rmm_init(&rmm_init); 232 233 return 0; 234 } 235 236 /******************************************************************************* 237 * Forward SMC to the other security state 238 ******************************************************************************/ 239 static uint64_t rmmd_smc_forward(uint32_t src_sec_state, 240 uint32_t dst_sec_state, uint64_t x0, 241 uint64_t x1, uint64_t x2, uint64_t x3, 242 uint64_t x4, void *handle) 243 { 244 cpu_context_t *ctx = cm_get_context(dst_sec_state); 245 246 /* Save incoming security state */ 247 cm_el1_sysregs_context_save(src_sec_state); 248 cm_el2_sysregs_context_save(src_sec_state); 249 250 /* Restore outgoing security state */ 251 cm_el1_sysregs_context_restore(dst_sec_state); 252 cm_el2_sysregs_context_restore(dst_sec_state); 253 cm_set_next_eret_context(dst_sec_state); 254 255 /* 256 * As per SMCCCv1.2, we need to preserve x4 to x7 unless 257 * being used as return args. Hence we differentiate the 258 * onward and backward path. Support upto 8 args in the 259 * onward path and 4 args in return path. 260 * Register x4 will be preserved by RMM in case it is not 261 * used in return path. 262 */ 263 if (src_sec_state == NON_SECURE) { 264 SMC_RET8(ctx, x0, x1, x2, x3, x4, 265 SMC_GET_GP(handle, CTX_GPREG_X5), 266 SMC_GET_GP(handle, CTX_GPREG_X6), 267 SMC_GET_GP(handle, CTX_GPREG_X7)); 268 } 269 270 SMC_RET5(ctx, x0, x1, x2, x3, x4); 271 } 272 273 /******************************************************************************* 274 * This function handles all SMCs in the range reserved for RMI. Each call is 275 * either forwarded to the other security state or handled by the RMM dispatcher 276 ******************************************************************************/ 277 uint64_t rmmd_rmi_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 278 uint64_t x3, uint64_t x4, void *cookie, 279 void *handle, uint64_t flags) 280 { 281 uint32_t src_sec_state; 282 283 /* If RMM failed to boot, treat any RMI SMC as unknown */ 284 if (rmm_boot_failed) { 285 WARN("RMMD: Failed to boot up RMM. Ignoring RMI call\n"); 286 SMC_RET1(handle, SMC_UNK); 287 } 288 289 /* Determine which security state this SMC originated from */ 290 src_sec_state = caller_sec_state(flags); 291 292 /* RMI must not be invoked by the Secure world */ 293 if (src_sec_state == SMC_FROM_SECURE) { 294 WARN("RMMD: RMI invoked by secure world.\n"); 295 SMC_RET1(handle, SMC_UNK); 296 } 297 298 /* 299 * Forward an RMI call from the Normal world to the Realm world as it 300 * is. 301 */ 302 if (src_sec_state == SMC_FROM_NON_SECURE) { 303 VERBOSE("RMMD: RMI call from non-secure world.\n"); 304 return rmmd_smc_forward(NON_SECURE, REALM, smc_fid, 305 x1, x2, x3, x4, handle); 306 } 307 308 if (src_sec_state != SMC_FROM_REALM) { 309 SMC_RET1(handle, SMC_UNK); 310 } 311 312 switch (smc_fid) { 313 case RMM_RMI_REQ_COMPLETE: { 314 uint64_t x5 = SMC_GET_GP(handle, CTX_GPREG_X5); 315 316 return rmmd_smc_forward(REALM, NON_SECURE, x1, 317 x2, x3, x4, x5, handle); 318 } 319 default: 320 WARN("RMMD: Unsupported RMM call 0x%08x\n", smc_fid); 321 SMC_RET1(handle, SMC_UNK); 322 } 323 } 324 325 /******************************************************************************* 326 * This cpu has been turned on. Enter RMM to initialise R-EL2. Entry into RMM 327 * is done after initialising minimal architectural state that guarantees safe 328 * execution. 329 ******************************************************************************/ 330 static void *rmmd_cpu_on_finish_handler(const void *arg) 331 { 332 long rc; 333 uint32_t linear_id = plat_my_core_pos(); 334 rmmd_rmm_context_t *ctx = &rmm_context[linear_id]; 335 336 if (rmm_boot_failed) { 337 /* RMM Boot failed on a previous CPU. Abort. */ 338 ERROR("RMM Failed to initialize. Ignoring for CPU%d\n", 339 linear_id); 340 return NULL; 341 } 342 343 /* 344 * Prepare warmboot arguments for RMM: 345 * arg0: This CPUID. 346 * arg1 to arg3: Not used. 347 */ 348 rmm_ep_info->args.arg0 = linear_id; 349 rmm_ep_info->args.arg1 = 0ULL; 350 rmm_ep_info->args.arg2 = 0ULL; 351 rmm_ep_info->args.arg3 = 0ULL; 352 353 /* Initialise RMM context with this entry point information */ 354 cm_setup_context(&ctx->cpu_ctx, rmm_ep_info); 355 356 /* Enable architecture extensions */ 357 manage_extensions_realm(&ctx->cpu_ctx); 358 359 /* Initialize RMM EL2 context. */ 360 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 361 362 rc = rmmd_rmm_sync_entry(ctx); 363 364 if (rc != E_RMM_BOOT_SUCCESS) { 365 ERROR("RMM init failed on CPU%d: %ld\n", linear_id, rc); 366 /* Mark the boot as failed for any other booting CPU */ 367 rmm_boot_failed = true; 368 } 369 370 return NULL; 371 } 372 373 /* Subscribe to PSCI CPU on to initialize RMM on secondary */ 374 SUBSCRIBE_TO_EVENT(psci_cpu_on_finish, rmmd_cpu_on_finish_handler); 375 376 /* Convert GPT lib error to RMMD GTS error */ 377 static int gpt_to_gts_error(int error, uint32_t smc_fid, uint64_t address) 378 { 379 int ret; 380 381 if (error == 0) { 382 return E_RMM_OK; 383 } 384 385 if (error == -EINVAL) { 386 ret = E_RMM_BAD_ADDR; 387 } else { 388 /* This is the only other error code we expect */ 389 assert(error == -EPERM); 390 ret = E_RMM_BAD_PAS; 391 } 392 393 ERROR("RMMD: PAS Transition failed. GPT ret = %d, PA: 0x%"PRIx64 ", FID = 0x%x\n", 394 error, address, smc_fid); 395 return ret; 396 } 397 398 /******************************************************************************* 399 * This function handles RMM-EL3 interface SMCs 400 ******************************************************************************/ 401 uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 402 uint64_t x3, uint64_t x4, void *cookie, 403 void *handle, uint64_t flags) 404 { 405 uint32_t src_sec_state; 406 int ret; 407 408 /* If RMM failed to boot, treat any RMM-EL3 interface SMC as unknown */ 409 if (rmm_boot_failed) { 410 WARN("RMMD: Failed to boot up RMM. Ignoring RMM-EL3 call\n"); 411 SMC_RET1(handle, SMC_UNK); 412 } 413 414 /* Determine which security state this SMC originated from */ 415 src_sec_state = caller_sec_state(flags); 416 417 if (src_sec_state != SMC_FROM_REALM) { 418 WARN("RMMD: RMM-EL3 call originated from secure or normal world\n"); 419 SMC_RET1(handle, SMC_UNK); 420 } 421 422 switch (smc_fid) { 423 case RMM_GTSI_DELEGATE: 424 ret = gpt_delegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 425 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 426 case RMM_GTSI_UNDELEGATE: 427 ret = gpt_undelegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 428 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 429 case RMM_ATTEST_GET_PLAT_TOKEN: 430 ret = rmmd_attest_get_platform_token(x1, &x2, x3); 431 SMC_RET2(handle, ret, x2); 432 case RMM_ATTEST_GET_REALM_KEY: 433 ret = rmmd_attest_get_signing_key(x1, &x2, x3); 434 SMC_RET2(handle, ret, x2); 435 436 case RMM_BOOT_COMPLETE: 437 VERBOSE("RMMD: running rmmd_rmm_sync_exit\n"); 438 rmmd_rmm_sync_exit(x1); 439 440 default: 441 WARN("RMMD: Unsupported RMM-EL3 call 0x%08x\n", smc_fid); 442 SMC_RET1(handle, SMC_UNK); 443 } 444 } 445