1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <assert.h> 9 #include <bl_common.h> 10 #include <debug.h> 11 #include <hikey_def.h> 12 #include <hikey_layout.h> 13 #include <mmio.h> 14 #include <platform.h> 15 #include <xlat_tables.h> 16 17 #define MAP_DDR MAP_REGION_FLAT(DDR_BASE, \ 18 DDR_SIZE - DDR_SEC_SIZE, \ 19 MT_DEVICE | MT_RW | MT_NS) 20 21 #define MAP_DEVICE MAP_REGION_FLAT(DEVICE_BASE, \ 22 DEVICE_SIZE, \ 23 MT_DEVICE | MT_RW | MT_SECURE) 24 25 #define MAP_TSP_MEM MAP_REGION_FLAT(TSP_SEC_MEM_BASE, \ 26 TSP_SEC_MEM_SIZE, \ 27 MT_MEMORY | MT_RW | MT_SECURE) 28 29 #define MAP_ROM_PARAM MAP_REGION_FLAT(XG2RAM0_BASE, \ 30 BL1_XG2RAM0_OFFSET, \ 31 MT_DEVICE | MT_RO | MT_SECURE) 32 33 #define MAP_SRAM MAP_REGION_FLAT(SRAM_BASE, \ 34 SRAM_SIZE, \ 35 MT_DEVICE | MT_RW | MT_SECURE) 36 37 /* 38 * BL1 needs to access the areas of MMC_SRAM. 39 * BL1 loads BL2 from eMMC into SRAM before DDR initialized. 40 */ 41 #define MAP_MMC_SRAM MAP_REGION_FLAT(HIKEY_BL1_MMC_DESC_BASE, \ 42 HIKEY_BL1_MMC_DESC_SIZE + \ 43 HIKEY_BL1_MMC_DATA_SIZE, \ 44 MT_DEVICE | MT_RW | MT_SECURE) 45 46 /* 47 * Table of regions for different BL stages to map using the MMU. 48 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to 49 * hikey_init_mmu_elx() will give the available subset of that, 50 */ 51 #ifdef IMAGE_BL1 52 static const mmap_region_t hikey_mmap[] = { 53 MAP_DEVICE, 54 MAP_ROM_PARAM, 55 MAP_MMC_SRAM, 56 {0} 57 }; 58 #endif 59 60 #ifdef IMAGE_BL2 61 static const mmap_region_t hikey_mmap[] = { 62 MAP_DDR, 63 MAP_DEVICE, 64 MAP_TSP_MEM, 65 MAP_SRAM, 66 {0} 67 }; 68 #endif 69 70 #ifdef IMAGE_BL31 71 static const mmap_region_t hikey_mmap[] = { 72 MAP_DEVICE, 73 MAP_SRAM, 74 MAP_TSP_MEM, 75 {0} 76 }; 77 #endif 78 79 #ifdef IMAGE_BL32 80 static const mmap_region_t hikey_mmap[] = { 81 MAP_DEVICE, 82 MAP_DDR, 83 {0} 84 }; 85 #endif 86 87 /* 88 * Macro generating the code for the function setting up the pagetables as per 89 * the platform memory map & initialize the mmu, for the given exception level 90 */ 91 #define HIKEY_CONFIGURE_MMU_EL(_el) \ 92 void hikey_init_mmu_el##_el(unsigned long total_base, \ 93 unsigned long total_size, \ 94 unsigned long ro_start, \ 95 unsigned long ro_limit, \ 96 unsigned long coh_start, \ 97 unsigned long coh_limit) \ 98 { \ 99 mmap_add_region(total_base, total_base, \ 100 total_size, \ 101 MT_MEMORY | MT_RW | MT_SECURE); \ 102 mmap_add_region(ro_start, ro_start, \ 103 ro_limit - ro_start, \ 104 MT_MEMORY | MT_RO | MT_SECURE); \ 105 mmap_add_region(coh_start, coh_start, \ 106 coh_limit - coh_start, \ 107 MT_DEVICE | MT_RW | MT_SECURE); \ 108 mmap_add(hikey_mmap); \ 109 init_xlat_tables(); \ 110 \ 111 enable_mmu_el##_el(0); \ 112 } 113 114 /* Define EL1 and EL3 variants of the function initialising the MMU */ 115 HIKEY_CONFIGURE_MMU_EL(1) 116 HIKEY_CONFIGURE_MMU_EL(3) 117 118 unsigned long plat_get_ns_image_entrypoint(void) 119 { 120 return HIKEY_NS_IMAGE_OFFSET; 121 } 122 123 unsigned int plat_get_syscnt_freq2(void) 124 { 125 return 1200000; 126 } 127