xref: /rk3399_ARM-atf/plat/hisilicon/hikey960/aarch64/hikey960_common.c (revision c3cf06f1a3a9b9ee8ac7a0ae505f95c45f7dca84)
1 /*
2  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arch_helpers.h>
8 #include <assert.h>
9 #include <bl_common.h>
10 #include <debug.h>
11 #include <mmio.h>
12 #include <platform.h>
13 #include <platform_def.h>
14 #include <xlat_tables.h>
15 
16 #include "../hikey960_def.h"
17 #include "../hikey960_private.h"
18 
19 #define MAP_DDR		MAP_REGION_FLAT(DDR_BASE,			\
20 					DDR_SIZE - DDR_SEC_SIZE,	\
21 					MT_MEMORY | MT_RW | MT_NS)
22 
23 #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
24 					DEVICE_SIZE,			\
25 					MT_DEVICE | MT_RW | MT_SECURE)
26 
27 #define MAP_BL1_RW	MAP_REGION_FLAT(BL1_RW_BASE,			\
28 					BL1_RW_LIMIT - BL1_RW_BASE,	\
29 					MT_MEMORY | MT_RW | MT_NS)
30 
31 #define MAP_UFS_DATA	MAP_REGION_FLAT(HIKEY960_UFS_DATA_BASE,		\
32 					HIKEY960_UFS_DATA_SIZE,		\
33 					MT_MEMORY | MT_RW | MT_NS)
34 
35 #define MAP_UFS_DESC	MAP_REGION_FLAT(HIKEY960_UFS_DESC_BASE,		\
36 					HIKEY960_UFS_DESC_SIZE,		\
37 					MT_MEMORY | MT_RW | MT_NS)
38 
39 #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE,		\
40 					TSP_SEC_MEM_SIZE,		\
41 					MT_MEMORY | MT_RW | MT_SECURE)
42 
43 /*
44  * Table of regions for different BL stages to map using the MMU.
45  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
46  * hikey960_init_mmu_elx() will give the available subset of that,
47  */
48 #ifdef IMAGE_BL1
49 static const mmap_region_t hikey960_mmap[] = {
50 	MAP_UFS_DATA,
51 	MAP_BL1_RW,
52 	MAP_UFS_DESC,
53 	MAP_DEVICE,
54 	{0}
55 };
56 #endif
57 
58 #ifdef IMAGE_BL2
59 static const mmap_region_t hikey960_mmap[] = {
60 	MAP_DDR,
61 	MAP_DEVICE,
62 	MAP_TSP_MEM,
63 	{0}
64 };
65 #endif
66 
67 #ifdef IMAGE_BL31
68 static const mmap_region_t hikey960_mmap[] = {
69 	MAP_DEVICE,
70 	MAP_TSP_MEM,
71 	{0}
72 };
73 #endif
74 
75 #ifdef IMAGE_BL32
76 static const mmap_region_t hikey960_mmap[] = {
77 	MAP_DEVICE,
78 	MAP_DDR,
79 	{0}
80 };
81 #endif
82 
83 /*
84  * Macro generating the code for the function setting up the pagetables as per
85  * the platform memory map & initialize the mmu, for the given exception level
86  */
87 #define HIKEY960_CONFIGURE_MMU_EL(_el)					\
88 	void hikey960_init_mmu_el##_el(unsigned long total_base,	\
89 				unsigned long total_size,		\
90 				unsigned long ro_start,			\
91 				unsigned long ro_limit,			\
92 				unsigned long coh_start,		\
93 				unsigned long coh_limit)		\
94 	{								\
95 	       mmap_add_region(total_base, total_base,			\
96 			       total_size,				\
97 			       MT_MEMORY | MT_RW | MT_SECURE);		\
98 	       mmap_add_region(ro_start, ro_start,			\
99 			       ro_limit - ro_start,			\
100 			       MT_MEMORY | MT_RO | MT_SECURE);		\
101 	       mmap_add_region(coh_start, coh_start,			\
102 			       coh_limit - coh_start,			\
103 			       MT_DEVICE | MT_RW | MT_SECURE);		\
104 	       mmap_add(hikey960_mmap);					\
105 	       init_xlat_tables();					\
106 									\
107 	       enable_mmu_el##_el(0);					\
108 	}
109 
110 /* Define EL1 and EL3 variants of the function initialising the MMU */
111 HIKEY960_CONFIGURE_MMU_EL(1)
112 HIKEY960_CONFIGURE_MMU_EL(3)
113 
114 unsigned long plat_get_ns_image_entrypoint(void)
115 {
116 	return NS_BL1U_BASE;
117 }
118 
119 unsigned int plat_get_syscnt_freq2(void)
120 {
121 	return 1920000;
122 }
123