fix(optee): initialize the structure

This corrects the MISRA violation C2012-9.1:
Initialize the structure with memset to ensures the structure
contains predictable zero values before being passed t

fix(optee): initialize the structure

This corrects the MISRA violation C2012-9.1:
Initialize the structure with memset to ensures the structure
contains predictable zero values before being passed to functions,
preventing potential undefined behavior from uninitialized
automatic storage.

Change-Id: Ib89b45b8aeefa211afacc77f948a5888815f9e68
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement. Enclosed statement body

fix(optee): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement. Enclosed statement body within the curly
braces.

Change-Id: Ic8523f1d6ffa367c1ea3753de367a9c88008b55d
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): add parenthesis for macro expressions

This corrects MISRA violation C2012‑20.7:
macro parameters used within expressions
were not enclosed in parentheses, risking
incorrect operator prec

fix(optee): add parenthesis for macro expressions

This corrects MISRA violation C2012‑20.7:
macro parameters used within expressions
were not enclosed in parentheses, risking
incorrect operator precedence after expansion.

The fix wraps all macro parameters in expressions
with parentheses to ensure intended evaluation
order and compliance with the rule.

Change-Id: Iaf5626afab2d8d8d945caf96798e0a8b33b32e53
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): move function to conditional block

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Mo

fix(optee): move function to conditional block

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Moving the function definition to match its usage scope.
The function is only called within a conditional compilation
block, so it should be defined within the same conditional scope.

Change-Id: I51071c9bb18591a3017e9ae4a2de1d7fca37de16
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): add boolean type for expressions

This corrects MISRA violation C2012‑14.4:
conditional or loop constructs were using non‑Boolean
expressions directly instead of comparisons or Boolean ty

fix(optee): add boolean type for expressions

This corrects MISRA violation C2012‑14.4:
conditional or loop constructs were using non‑Boolean
expressions directly instead of comparisons or Boolean types.

The fix replaces them with explicit Boolean tests enforcing
that all controlling expressions have essentially Boolean type
and improving code clarity and type safety.

Change-Id: I150a8a674e8abf9c5409cc3d557af0e288ba1668
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.

The condition is compared

fix(optee): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.

The condition is compared with NULL to get boolean result.

Change-Id: Ib386b5a3c3a7febbbcb5da7546e72ea6269744dc
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): typecast operands to match data type

This corrects the MISRA violation C2012-10.1:

Operands of different essential types were used in
bitwise, arithmetic, or logical operations, violati

fix(optee): typecast operands to match data type

This corrects the MISRA violation C2012-10.1:

Operands of different essential types were used in
bitwise, arithmetic, or logical operations, violating
type uniformity.

The fix suffixes integer literals with 'U' to specify
them as unsigned constants, ensuring operands in
bitwise, arithmetic, or logical operations have
consistent unsigned types. This approach avoids implicit
type promotions and maintains type safety by properly
declaring the intended type of literals.

Change-Id: Iead89348f107772175bbf7768554258b0095a922
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(cm): deprecate use of NS_TIMER_SWITCH

On AArch64, secure world has it's own EL3 physical timer registers
accessible to secure EL1 in absence of S-EL2. With S-EL2 there is
virtualized view availa

fix(cm): deprecate use of NS_TIMER_SWITCH

On AArch64, secure world has it's own EL3 physical timer registers
accessible to secure EL1 in absence of S-EL2. With S-EL2 there is
virtualized view available for EL1 timer registers. So it is
unreasonable for secure world to use non-secure EL1 physical timer
registers. Moreover, the non-secure operating system (Linux in our case)
relies heavily on these EL1 physical timer registers for scheduling
decisions. If NS_TIMER_SWITCH is enabled, it simply breaks the preemption
model of the non-secure world by disabling non-secure timer interrupts
leading to RCU stalls being observed on long running secure world tasks.

The only arch timer register which will benefit from context management
is cntkctl_el1: Counter-timer Kernel Control Register. This enables the
secure and non-secure worlds to independently control accesses to EL0
for counter-timer registers. This is something that OP-TEE uses to
enable ftrace feature for Trusted Applications and SPM_MM uses for EL0
access as well.

Lets enable context management of cntkctl_el1 by default and deprecate
conditional context management of non-secure EL1 physical timer
registers for whom there isn't any upstream user. With that deprecate
this NS_TIMER_SWITCH build option which just adds confusion for the
platform maintainers. It will be eventually dropped following
deprecation policy of TF-A.

Reported-by: Stauffer Thomas MTANA <thomas.stauffer@mt.com>
Reported-by: Andrew Davis <afd@ti.com>
Change-Id: Ifb3a919dc0bf8c05c38895352de5fe94b4f4387e
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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fix(optee): allow opteed_handle_smc_load to handle 64-bit data_pa

Change the datatype of data_pa to uint64_t to allow
opteed_handle_smc_load to handle 64-bit data_pa from non secure.

Change-Id: I90

fix(optee): allow opteed_handle_smc_load to handle 64-bit data_pa

Change the datatype of data_pa to uint64_t to allow
opteed_handle_smc_load to handle 64-bit data_pa from non secure.

Change-Id: I90d0630d23dbd97143a975f00a0f6b74b7cc0223
Signed-off-by: Yidi Lin <yidilin@google.com>

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feat(psci): make pabandon support generic

Support for aborted powerdowns does not require much dedicated code.
Rather, it is largely a matter of orchestrating things to happen in the
right order.

T

feat(psci): make pabandon support generic

Support for aborted powerdowns does not require much dedicated code.
Rather, it is largely a matter of orchestrating things to happen in the
right order.

The only exception to this are older secure world dispatchers, which
assume that a CPU_SUSPEND call will be terminal and therefore can
clobber context. This was patched over in common code and hidden behind
a flag. This patch moves this to the dispatchers themselves.

Dispatchers that don't register svc_suspend{_finish} are unaffected.
Those that do must save the NS context before clobbering it and
restoring in only in case of a pabandon. Due to this operation being
non-trivial, this patch makes the assumption that these dispatchers will
only be present on hardware that does not support pabandon and therefore
does not add any contexting for them. In case this assumption ever
changes, asserts are added that should alert us of this change.

Change-Id: I94a907515b782b4d2136c0d274246cfe1d567c0e
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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build(handoff)!: switch to LibTL submodule

Removes in-tree Transfer List implementation and updates all references
to use the external LibTL submodule. Updates include paths, Makefile
macros, and pl

build(handoff)!: switch to LibTL submodule

Removes in-tree Transfer List implementation and updates all references
to use the external LibTL submodule. Updates include paths, Makefile
macros, and platform integration logic to link with LibTL as a static
library.

If you cloned TF-A without the `--recurse-submodules` flag, you can
ensure that this submodule is present by running:

git submodule update --init --recursive

BREAKING-CHANGE: LibTL is now included in TF-A as a submodule.
Please run `git submodule update --init --recursive` if you encounter
issues after migrating to the latest version of TF-A.

Change-Id: I1fa31f7b730066c27985d968698e553b00b07c38
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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refactor(optee): guard handoff logic w/ build flag

Prepare OP-TEE for environments where the Firmware Handoff (LibTL)
submodule may not be available. Wrap all Transfer List dependent logic
in `#if

refactor(optee): guard handoff logic w/ build flag

Prepare OP-TEE for environments where the Firmware Handoff (LibTL)
submodule may not be available. Wrap all Transfer List dependent logic
in `#if TRANSFER_LIST` guards, ensuring OP-TEE can build and run without
the submodule.

This is useful for platforms or builds not integrating the firmware
handoff mechanism.

Change-Id: I701e357a8ee29d37b370c98c907d3e2795a921dd
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(handoff): fix register convention in opteed

The commit with Change-Id:Ie417e054a7a4c192024a2679419e99efeded1705
updated the register convention r1/x1 values but missing necessary
changes in BL31

fix(handoff): fix register convention in opteed

The commit with Change-Id:Ie417e054a7a4c192024a2679419e99efeded1705
updated the register convention r1/x1 values but missing necessary
changes in BL31.
As a result, a system panic observed during setup for BL32 when
TRANSFER_LIST is enabled due to unexpected arguments.
This patch is to fix this issue for optee.

Change-Id: I13e116e7cb5a7d89fafc11d20295cffbf24793ab
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>

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feat(handoff): fix register convention r1/x1 value on transfer list

According to recently firmware handsoff spec [1]'s "Register usage at handoff
boundary", Transfer List's signature value was chang

feat(handoff): fix register convention r1/x1 value on transfer list

According to recently firmware handsoff spec [1]'s "Register usage at handoff
boundary", Transfer List's signature value was changed from 0x40_b10b
(3 bytes) to 4a0f_b10b (4 bytes).

As updating of TL's signature, register value of x1/r1 should be:

In aarch32's r1 value should be
R1[23:0]: set to the TL signature (4a0f_b10b -> masked range value: 0f_b10b)
R1[31:24]: version of the register convention == 1
and
In aarch64's x1 value should be
X1[31:0]: set to the TL signature (4a0f_b10b)
X1[39:32]: version of the register convention == 1
X1[63:40]: MBZ
(See the [2] and [3]).

Therefore, it requires to separate mask and shift value for register
convention version field when sets each r1/x1.

This patch fix two problems:
1. breaking X1 value with updated specification in aarch64
- change of length of signature field.

2. previous error value set in R1 in arm32.
- length of signature should be 24, but it uses 32bit signature.

This change is breaking change. It requires some patch for other
softwares (u-boot[4], optee[5]).

Link: https://github.com/FirmwareHandoff/firmware_handoff [1]
Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2]
Link: https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027 [3]
Link: https://lists.denx.de/pipermail/u-boot/2024-July/558628.html [4]
Link: https://github.com/OP-TEE/optee_os/pull/6933 [5]
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: Ie417e054a7a4c192024a2679419e99efeded1705

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