1/* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8#include <assert_macros.S> 9#include <asm_macros.S> 10#include <assert_macros.S> 11#include <bl31/ea_handle.h> 12#include <context.h> 13#include <lib/extensions/ras_arch.h> 14 15 16 .globl handle_lower_el_ea_esb 17 .globl enter_lower_el_sync_ea 18 .globl enter_lower_el_async_ea 19 20 21/* 22 * Function to delegate External Aborts synchronized by ESB instruction at EL3 23 * vector entry. This function assumes GP registers x0-x29 have been saved, and 24 * are available for use. It delegates the handling of the EA to platform 25 * handler, and returns only upon successfully handling the EA; otherwise 26 * panics. On return from this function, the original exception handler is 27 * expected to resume. 28 */ 29func handle_lower_el_ea_esb 30 mov x0, #ERROR_EA_ESB 31 mrs x1, DISR_EL1 32 b ea_proceed 33endfunc handle_lower_el_ea_esb 34 35 36/* 37 * This function forms the tail end of Synchronous Exception entry from lower 38 * EL, and expects to handle only Synchronous External Aborts from lower EL. If 39 * any other kind of exception is detected, then this function reports unhandled 40 * exception. 41 * 42 * Since it's part of exception vector, this function doesn't expect any GP 43 * registers to have been saved. It delegates the handling of the EA to platform 44 * handler, and upon successfully handling the EA, exits EL3; otherwise panics. 45 */ 46func enter_lower_el_sync_ea 47 /* 48 * Explicitly save x30 so as to free up a register and to enable 49 * branching. 50 */ 51 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 52 53 mrs x30, esr_el3 54 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH 55 56 /* Check for I/D aborts from lower EL */ 57 cmp x30, #EC_IABORT_LOWER_EL 58 b.eq 1f 59 60 cmp x30, #EC_DABORT_LOWER_EL 61 b.ne 2f 62 631: 64 /* Test for EA bit in the instruction syndrome */ 65 mrs x30, esr_el3 66 tbz x30, #ESR_ISS_EABORT_EA_BIT, 2f 67 68 /* Save GP registers */ 69 bl save_gp_registers 70 71 /* Setup exception class and syndrome arguments for platform handler */ 72 mov x0, #ERROR_EA_SYNC 73 mrs x1, esr_el3 74 adr x30, el3_exit 75 b delegate_sync_ea 76 772: 78 /* Synchronous exceptions other than the above are assumed to be EA */ 79 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 80 no_ret report_unhandled_exception 81endfunc enter_lower_el_sync_ea 82 83 84/* 85 * This function handles SErrors from lower ELs. 86 * 87 * Since it's part of exception vector, this function doesn't expect any GP 88 * registers to have been saved. It delegates the handling of the EA to platform 89 * handler, and upon successfully handling the EA, exits EL3; otherwise panics. 90 */ 91func enter_lower_el_async_ea 92 /* 93 * Explicitly save x30 so as to free up a register and to enable 94 * branching 95 */ 96 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 97 98 /* Save GP registers */ 99 bl save_gp_registers 100 101 /* Setup exception class and syndrome arguments for platform handler */ 102 mov x0, #ERROR_EA_ASYNC 103 mrs x1, esr_el3 104 adr x30, el3_exit 105 b delegate_async_ea 106endfunc enter_lower_el_async_ea 107 108 109/* 110 * Prelude for Synchronous External Abort handling. This function assumes that 111 * all GP registers have been saved by the caller. 112 * 113 * x0: EA reason 114 * x1: EA syndrome 115 */ 116func delegate_sync_ea 117#if RAS_EXTENSION 118 /* 119 * Check for Uncontainable error type. If so, route to the platform 120 * fatal error handler rather than the generic EA one. 121 */ 122 ubfx x2, x1, #EABORT_SET_SHIFT, #EABORT_SET_WIDTH 123 cmp x2, #ERROR_STATUS_SET_UC 124 b.ne 1f 125 126 /* Check fault status code */ 127 ubfx x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH 128 cmp x3, #SYNC_EA_FSC 129 b.ne 1f 130 131 no_ret plat_handle_uncontainable_ea 1321: 133#endif 134 135 b ea_proceed 136endfunc delegate_sync_ea 137 138 139/* 140 * Prelude for Asynchronous External Abort handling. This function assumes that 141 * all GP registers have been saved by the caller. 142 * 143 * x0: EA reason 144 * x1: EA syndrome 145 */ 146func delegate_async_ea 147#if RAS_EXTENSION 148 /* 149 * Check for Implementation Defined Syndrome. If so, skip checking 150 * Uncontainable error type from the syndrome as the format is unknown. 151 */ 152 tbnz x1, #SERROR_IDS_BIT, 1f 153 154 /* 155 * Check for Uncontainable error type. If so, route to the platform 156 * fatal error handler rather than the generic EA one. 157 */ 158 ubfx x2, x1, #EABORT_AET_SHIFT, #EABORT_AET_WIDTH 159 cmp x2, #ERROR_STATUS_UET_UC 160 b.ne 1f 161 162 /* Check DFSC for SError type */ 163 ubfx x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH 164 cmp x3, #DFSC_SERROR 165 b.ne 1f 166 167 no_ret plat_handle_uncontainable_ea 1681: 169#endif 170 171 b ea_proceed 172endfunc delegate_async_ea 173 174 175/* 176 * Delegate External Abort handling to platform's EA handler. This function 177 * assumes that all GP registers have been saved by the caller. 178 * 179 * x0: EA reason 180 * x1: EA syndrome 181 */ 182func ea_proceed 183 /* 184 * If the ESR loaded earlier is not zero, we were processing an EA 185 * already, and this is a double fault. 186 */ 187 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3] 188 cbz x5, 1f 189 no_ret plat_handle_double_fault 190 1911: 192 /* Save EL3 state */ 193 mrs x2, spsr_el3 194 mrs x3, elr_el3 195 stp x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3] 196 197 /* 198 * Save ESR as handling might involve lower ELs, and returning back to 199 * EL3 from there would trample the original ESR. 200 */ 201 mrs x4, scr_el3 202 mrs x5, esr_el3 203 stp x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3] 204 205 /* 206 * Setup rest of arguments, and call platform External Abort handler. 207 * 208 * x0: EA reason (already in place) 209 * x1: Exception syndrome (already in place). 210 * x2: Cookie (unused for now). 211 * x3: Context pointer. 212 * x4: Flags (security state from SCR for now). 213 */ 214 mov x2, xzr 215 mov x3, sp 216 ubfx x4, x4, #0, #1 217 218 /* Switch to runtime stack */ 219 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP] 220 msr spsel, #0 221 mov sp, x5 222 223 mov x29, x30 224#if ENABLE_ASSERTIONS 225 /* Stash the stack pointer */ 226 mov x28, sp 227#endif 228 bl plat_ea_handler 229 230#if ENABLE_ASSERTIONS 231 /* 232 * Error handling flows might involve long jumps; so upon returning from 233 * the platform error handler, validate that the we've completely 234 * unwound the stack. 235 */ 236 mov x27, sp 237 cmp x28, x27 238 ASM_ASSERT(eq) 239#endif 240 241 /* Make SP point to context */ 242 msr spsel, #1 243 244 /* Restore EL3 state and ESR */ 245 ldp x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3] 246 msr spsr_el3, x1 247 msr elr_el3, x2 248 249 /* Restore ESR_EL3 and SCR_EL3 */ 250 ldp x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3] 251 msr scr_el3, x3 252 msr esr_el3, x4 253 254#if ENABLE_ASSERTIONS 255 cmp x4, xzr 256 ASM_ASSERT(ne) 257#endif 258 259 /* Clear ESR storage */ 260 str xzr, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3] 261 262 ret x29 263endfunc ea_proceed 264