1 /* 2 * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <common/bl_common.h> 12 #include <common/debug.h> 13 #include <common/desc_image_load.h> 14 #include <drivers/console.h> 15 #include <drivers/generic_delay_timer.h> 16 #include <drivers/ti/uart/uart_16550.h> 17 #include <lib/coreboot.h> 18 #include <lib/mmio.h> 19 #include <plat_private.h> 20 #include <plat/common/platform.h> 21 22 static entry_point_info_t bl32_ep_info; 23 static entry_point_info_t bl33_ep_info; 24 25 /******************************************************************************* 26 * Return a pointer to the 'entry_point_info' structure of the next image for 27 * the security state specified. BL33 corresponds to the non-secure image type 28 * while BL32 corresponds to the secure image type. A NULL pointer is returned 29 * if the image does not exist. 30 ******************************************************************************/ 31 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 32 { 33 entry_point_info_t *next_image_info; 34 35 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 36 assert(next_image_info->h.type == PARAM_EP); 37 38 /* None of the images on this platform can have 0x0 as the entrypoint */ 39 if (next_image_info->pc) 40 return next_image_info; 41 else 42 return NULL; 43 } 44 45 #pragma weak params_early_setup 46 void params_early_setup(u_register_t plat_param_from_bl2) 47 { 48 } 49 50 /******************************************************************************* 51 * Perform any BL3-1 early platform setup. Here is an opportunity to copy 52 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they 53 * are lost (potentially). This needs to be done before the MMU is initialized 54 * so that the memory layout can be used while creating page tables. 55 * BL2 has flushed this information to memory, so we are guaranteed to pick up 56 * good data. 57 ******************************************************************************/ 58 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 59 u_register_t arg2, u_register_t arg3) 60 { 61 static console_16550_t console; 62 63 params_early_setup(arg1); 64 65 #if COREBOOT 66 if (coreboot_serial.type) 67 console_16550_register(coreboot_serial.baseaddr, 68 coreboot_serial.input_hertz, 69 coreboot_serial.baud, 70 &console); 71 #else 72 console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK, 73 PLAT_RK_UART_BAUDRATE, &console); 74 #endif 75 76 VERBOSE("bl31_setup\n"); 77 78 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); 79 } 80 81 /******************************************************************************* 82 * Perform any BL3-1 platform setup code 83 ******************************************************************************/ 84 void bl31_platform_setup(void) 85 { 86 generic_delay_timer_init(); 87 plat_rockchip_soc_init(); 88 89 /* Initialize the gic cpu and distributor interfaces */ 90 plat_rockchip_gic_driver_init(); 91 plat_rockchip_gic_init(); 92 plat_rockchip_pmu_init(); 93 } 94 95 /******************************************************************************* 96 * Perform the very early platform specific architectural setup here. At the 97 * moment this is only intializes the mmu in a quick and dirty way. 98 ******************************************************************************/ 99 void bl31_plat_arch_setup(void) 100 { 101 plat_cci_init(); 102 plat_cci_enable(); 103 plat_configure_mmu_el3(BL_CODE_BASE, 104 BL_COHERENT_RAM_END - BL_CODE_BASE, 105 BL_CODE_BASE, 106 BL_CODE_END, 107 BL_COHERENT_RAM_BASE, 108 BL_COHERENT_RAM_END); 109 } 110