feat(debug): add helpers for aborts on AARCH32New helper functions are created to handle data & prefetch abortsin AARCH32. They call platform functions, just like whatreport_exception is doing.A
feat(debug): add helpers for aborts on AARCH32New helper functions are created to handle data & prefetch abortsin AARCH32. They call platform functions, just like whatreport_exception is doing.As extended MSR/MRS instructions (to access lr_abt in monitor mode)are only available if CPU (Armv7) has virtualization extension,the functions branch to original report_exception handlers if this isnot the case.Those new helpers are created mainly to distinguish data and prefetchaborts, as they both share the same mode.This adds 40 bytes of code.Change-Id: I5dd31930344ad4e3a658f8a9d366a87a300aeb67Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Avoid the use of linker *_SIZE__ macrosThe use of end addresses is preferred over the size of sections.This was done for some AARCH64 files for PIE with commit [1],and some extra explanations can
Avoid the use of linker *_SIZE__ macrosThe use of end addresses is preferred over the size of sections.This was done for some AARCH64 files for PIE with commit [1],and some extra explanations can be found in its commit message.Align the missing AARCH64 files.For AARCH32 files, this is required to prepare PIE support introduction. [1] f1722b693d36 ("PIE: Use PC relative adrp/adr for symbol reference")Change-Id: I8f1c06580182b10c680310850f72904e58a54d7dSigned-off-by: Yann Gautier <yann.gautier@st.com>
Apply stricter speculative load restrictionThe SCTLR.DSSBS bit is zero by default thus disabling speculative loads.However, we also explicitly set it to zero for BL2 and TSP images wheneach image
Apply stricter speculative load restrictionThe SCTLR.DSSBS bit is zero by default thus disabling speculative loads.However, we also explicitly set it to zero for BL2 and TSP images wheneach image initialises its context. This is done to ensure that theimage environment is initialised in a safe state, regardless of thereset value of the bit.Change-Id: If25a8396641edb640f7f298b8d3309d5cba3cd79Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Sanitise includes across codebaseEnforce full include path for includes. Deprecate old paths.The following folders inside include/lib have been left unchanged:- include/lib/cpus/${ARCH}- inclu
Sanitise includes across codebaseEnforce full include path for includes. Deprecate old paths.The following folders inside include/lib have been left unchanged:- include/lib/cpus/${ARCH}- include/lib/el3_runtime/${ARCH}The reason for this change is that having a global namespace forincludes isn't a good idea. It defeats one of the advantages of havingfolders and it introduces problems that are sometimes subtle (becauseyou may not know the header you are actually including if there are twoof them).For example, this patch had to be created because two headers werecalled the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platformto avoid collision."). More recently, this patch has had similarproblems: 46f9b2c3a282 ("drivers: add tzc380 support").This problem was introduced in commit 4ecca33988b9 ("Move include andsource files to logical locations"). At that time, there weren't toomany headers so it wasn't a real issue. However, time has shown thatthis creates problems.Platforms that want to preserve the way they include headers may add theremoved paths to PLAT_INCLUDES, but this is discouraged.Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8fSigned-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Fix BL2U entrypoint possible parameter corruptionReplace the use of r12 by r10 to save the value of a parameter ofbl2u_entrypoint to pass it to bl2u_early_platform_setup at the end ofthe function
Fix BL2U entrypoint possible parameter corruptionReplace the use of r12 by r10 to save the value of a parameter ofbl2u_entrypoint to pass it to bl2u_early_platform_setup at the end ofthe function. r10 is a callee saved register so it will not becomecorrupted by C code, whereas r12 is the The Intra-Procedure-call scratchregister potentially used by veneers. See the ARM AAPCS document (ARMIHI 0042F).Change-Id: I4f37e54a6b550719edb40bb24cd8f498827e2749Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
AArch32: Add BL2U supportAdd support for firmware upgrade on AArch32.This patch has been tested on the FVP models.NOTE: Firmware upgrade on Juno AArch32 is not currently supported.Change-Id: I
AArch32: Add BL2U supportAdd support for firmware upgrade on AArch32.This patch has been tested on the FVP models.NOTE: Firmware upgrade on Juno AArch32 is not currently supported.Change-Id: I1ca8078214eaf86b46463edd14740120af930aecSigned-off-by: dp-arm <dimitris.papastamos@arm.com>Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>