1 /* 2 * Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef INTERRUPT_MGMT_H 8 #define INTERRUPT_MGMT_H 9 10 #include <arch.h> 11 #include <lib/utils_def.h> 12 13 /******************************************************************************* 14 * Constants for the types of interrupts recognised by the IM framework 15 ******************************************************************************/ 16 #define INTR_TYPE_S_EL1 U(0) 17 #define INTR_TYPE_EL3 U(1) 18 #define INTR_TYPE_NS U(2) 19 #define MAX_INTR_TYPES U(3) 20 #define INTR_TYPE_INVAL MAX_INTR_TYPES 21 22 /* Interrupt routing modes */ 23 #define INTR_ROUTING_MODE_PE 0 24 #define INTR_ROUTING_MODE_ANY 1 25 26 /* 27 * Constant passed to the interrupt handler in the 'id' field when the 28 * framework does not read the gic registers to determine the interrupt id. 29 */ 30 #define INTR_ID_UNAVAILABLE U(0xFFFFFFFF) 31 32 33 /******************************************************************************* 34 * Mask for _both_ the routing model bits in the 'flags' parameter and 35 * constants to define the valid routing models for each supported interrupt 36 * type 37 ******************************************************************************/ 38 #define INTR_RM_FLAGS_SHIFT U(0x0) 39 #define INTR_RM_FLAGS_MASK U(0x3) 40 /* Routed to EL3 from NS. Taken to S-EL1 from Secure */ 41 #define INTR_SEL1_VALID_RM0 U(0x2) 42 /* Routed to EL3 from NS and Secure */ 43 #define INTR_SEL1_VALID_RM1 U(0x3) 44 /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */ 45 #define INTR_NS_VALID_RM0 U(0x0) 46 /* Routed to EL1/EL2 from NS and to EL3 from Secure */ 47 #define INTR_NS_VALID_RM1 U(0x1) 48 /* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */ 49 #define INTR_EL3_VALID_RM0 U(0x2) 50 /* Routed to EL3 from NS and Secure */ 51 #define INTR_EL3_VALID_RM1 U(0x3) 52 /* This is the default routing model */ 53 #define INTR_DEFAULT_RM U(0x0) 54 55 /******************************************************************************* 56 * Constants for the _individual_ routing model bits in the 'flags' field for 57 * each interrupt type and mask to validate the 'flags' parameter while 58 * registering an interrupt handler 59 ******************************************************************************/ 60 #define INTR_TYPE_FLAGS_MASK U(0xFFFFFFFC) 61 62 #define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */ 63 #define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */ 64 #define INTR_RM_FROM_FLAG_MASK U(1) 65 #define get_interrupt_rm_flag(flag, ss) \ 66 ((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK) 67 #define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss)) 68 #define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss))) 69 70 /******************************************************************************* 71 * Macros to set the 'flags' parameter passed to an interrupt type handler. Only 72 * the flag to indicate the security state when the exception was generated is 73 * supported. 74 ******************************************************************************/ 75 #define INTR_SRC_SS_FLAG_SHIFT U(0) /* BIT[0] */ 76 #define INTR_SRC_SS_FLAG_MASK U(1) 77 #define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT) 78 #define clr_interrupt_src_ss(flag) ((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT)) 79 #define get_interrupt_src_ss(flag) (((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \ 80 INTR_SRC_SS_FLAG_MASK) 81 82 #ifndef __ASSEMBLER__ 83 84 #include <errno.h> 85 #include <stdint.h> 86 87 /******************************************************************************* 88 * Helpers to validate the routing model bits in the 'flags' for a type 89 * of interrupt. If the model does not match one of the valid masks 90 * -EINVAL is returned. 91 ******************************************************************************/ 92 static inline int32_t validate_sel1_interrupt_rm(uint32_t x) 93 { 94 if ((x == INTR_SEL1_VALID_RM0) || (x == INTR_SEL1_VALID_RM1)) 95 return 0; 96 97 return -EINVAL; 98 } 99 100 static inline int32_t validate_ns_interrupt_rm(uint32_t x) 101 { 102 if ((x == INTR_NS_VALID_RM0) || (x == INTR_NS_VALID_RM1)) 103 return 0; 104 105 return -EINVAL; 106 } 107 108 static inline int32_t validate_el3_interrupt_rm(uint32_t x) 109 { 110 #if EL3_EXCEPTION_HANDLING && !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1)) 111 /* 112 * With EL3 exception handling, EL3 interrupts are always routed to EL3 113 * from both Secure and Non-secure, when the SPMC does not live in S-EL2. 114 * Therefore INTR_EL3_VALID_RM1 is the only valid routing model. 115 */ 116 if (x == INTR_EL3_VALID_RM1) 117 return 0; 118 #else 119 /* 120 * When EL3_EXCEPTION_HANDLING is not defined both routing modes are 121 * valid. This is the most common case. The exception to this rule is 122 * when EL3_EXCEPTION_HANDLING is defined but also when the SPMC lives 123 * at S-EL2. In this case, Group0 Interrupts are trapped to the SPMC 124 * when running in S-EL0 and S-EL1. The SPMC may handle the interrupt 125 * itself, delegate it to an SP or forward to EL3 for handling. 126 */ 127 if ((x == INTR_EL3_VALID_RM0) || (x == INTR_EL3_VALID_RM1)) 128 return 0; 129 #endif 130 131 return -EINVAL; 132 } 133 134 /******************************************************************************* 135 * Prototype for defining a handler for an interrupt type 136 ******************************************************************************/ 137 typedef uint64_t (*interrupt_type_handler_t)(uint32_t id, 138 uint32_t flags, 139 void *handle, 140 void *cookie); 141 142 /******************************************************************************* 143 * Function & variable prototypes 144 ******************************************************************************/ 145 u_register_t get_scr_el3_from_routing_model(uint32_t security_state); 146 int32_t set_routing_model(uint32_t type, uint32_t flags); 147 int32_t register_interrupt_type_handler(uint32_t type, 148 interrupt_type_handler_t handler, 149 uint32_t flags); 150 interrupt_type_handler_t get_interrupt_type_handler(uint32_t type); 151 int disable_intr_rm_local(uint32_t type, uint32_t security_state); 152 int enable_intr_rm_local(uint32_t type, uint32_t security_state); 153 154 #endif /*__ASSEMBLER__*/ 155 #endif /* INTERRUPT_MGMT_H */ 156