1 /* 2 * Copyright (c) 2016 - 2020, Broadcom 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <inttypes.h> 8 #include <stddef.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <lib/mmio.h> 15 16 #include "bcm_emmc.h" 17 #include "emmc_chal_types.h" 18 #include "emmc_csl_sdprot.h" 19 #include "emmc_chal_sd.h" 20 #include "emmc_csl_sdcmd.h" 21 #include "emmc_csl_sd.h" 22 #include "emmc_pboot_hal_memory_drv.h" 23 24 #define SD_CARD_BUSY 0x80000000 25 #define SD_CARD_RETRY_LIMIT 1000 26 #define SD_CARD_HIGH_SPEED_PS 13 27 #define SD_CHK_HIGH_SPEED_MODE 0x00FFFFF1 28 #define SD_SET_HIGH_SPEED_MODE 0x80FFFFF1 29 #define SD_MMC_ENABLE_HIGH_SPEED 0x03b90100 //0x03b90103 30 #define SD_MMC_8BIT_MODE 0x03b70200 31 #define SD_MMC_4BIT_MODE 0x03b70100 32 #define SD_MMC_1BIT_MODE 0x03b70000 33 34 #define SD_MMC_BOOT_8BIT_MODE 0x03b10200 35 #define SD_MMC_BOOT_4BIT_MODE 0x03b10100 36 #define SD_MMC_BOOT_1BIT_MODE 0x03b10000 37 #define SDIO_HW_EMMC_EXT_CSD_BOOT_CNF 0X03B30000 38 39 #ifdef USE_EMMC_FIP_TOC_CACHE 40 /* 41 * Cache size mirrors the size of the global eMMC temp buffer 42 * which is used for non-image body reads such as headers, ToC etc. 43 */ 44 #define CACHE_SIZE ((EMMC_BLOCK_SIZE) * 2) 45 #define PARTITION_BLOCK_ADDR ((PLAT_FIP_ATTEMPT_OFFSET)/(EMMC_BLOCK_SIZE)) 46 47 static uint32_t cached_partition_block; 48 static uint8_t cached_block[CACHE_SIZE]; 49 #endif 50 51 static int set_card_data_width(struct sd_handle *handle, int width); 52 static int abort_err(struct sd_handle *handle); 53 static int err_recovery(struct sd_handle *handle, uint32_t errors); 54 static int xfer_data(struct sd_handle *handle, uint32_t mode, uint32_t addr, 55 uint32_t length, uint8_t *base); 56 57 int set_boot_config(struct sd_handle *handle, uint32_t config) 58 { 59 return mmc_cmd6(handle, SDIO_HW_EMMC_EXT_CSD_BOOT_CNF | config); 60 } 61 62 void process_csd_mmc_speed(struct sd_handle *handle, uint32_t csd_mmc_speed) 63 { 64 uint32_t div_ctrl_setting; 65 66 /* CSD field TRAN_SPEED: 67 * Bits [2:0] 0 = 100 KHz 68 * 1 = 1 MHz 69 * 2 = 10 MHz 70 * 3 = 100 MHz 71 * 4...7 Reserved. 72 * Bits [6:3] 0 = Reserved 73 * 1 = 1.0 74 * 2 = 1.2 75 * 3 = 1.3 76 * 4 = 1.5 77 * 5 = 2.0 78 * 6 = 2.6 79 * 7 = 3.0 80 * 8 = 3.5 81 * 9 = 4.0 82 * A = 4.5 83 * B = 5.2 84 * C = 5.5 85 * D = 6.0 86 * E = 7.0 87 * F = 8.0 88 * For cards supporting version 4.0, 4.1, and 4.2 of the standard, 89 * the value shall be 20 MHz (0x2A). 90 * For cards supporting version 4.3 , the value shall be 26 MHz (0x32) 91 */ 92 93 switch (csd_mmc_speed & 0x7F) { 94 case 0x2A: 95 EMMC_TRACE("Speeding up eMMC clock to 20MHz\n"); 96 div_ctrl_setting = 97 chal_sd_freq_2_div_ctrl_setting(20 * 1000 * 1000); 98 break; 99 case 0x32: 100 EMMC_TRACE("Speeding up eMMC clock to 26MHz\n"); 101 div_ctrl_setting = 102 chal_sd_freq_2_div_ctrl_setting(26 * 1000 * 1000); 103 break; 104 default: 105 /* Unknown */ 106 return; 107 } 108 109 chal_sd_set_clock((CHAL_HANDLE *) handle->device, div_ctrl_setting, 0); 110 111 chal_sd_set_clock((CHAL_HANDLE *) handle->device, div_ctrl_setting, 1); 112 113 SD_US_DELAY(1000); 114 } 115 116 117 /* 118 * The function changes SD/SDIO/MMC card data width if 119 * the card support configurable data width. The host controller 120 * and the card has to be in the same bus data width. 121 */ 122 int set_card_data_width(struct sd_handle *handle, int width) 123 { 124 uint32_t data_width = 0; 125 int is_valid_arg = 1; 126 int rc = SD_FAIL; 127 char *bitwidth_str = " "; 128 char *result_str = "failed"; 129 130 switch (width) { 131 #ifdef DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT 132 case SD_BUS_DATA_WIDTH_8BIT: 133 data_width = SD_MMC_8BIT_MODE; 134 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 135 bitwidth_str = "8_BIT"; 136 #endif 137 break; 138 #endif 139 case SD_BUS_DATA_WIDTH_4BIT: 140 data_width = SD_MMC_4BIT_MODE; 141 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 142 bitwidth_str = "4_BIT"; 143 #endif 144 break; 145 146 case SD_BUS_DATA_WIDTH_1BIT: 147 data_width = SD_MMC_1BIT_MODE; 148 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 149 bitwidth_str = "1_BIT"; 150 #endif 151 break; 152 153 default: 154 is_valid_arg = 0; 155 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 156 bitwidth_str = "unknown"; 157 #endif 158 break; 159 } 160 161 if (is_valid_arg) { 162 rc = mmc_cmd6(handle, data_width); 163 if (rc == SD_OK) { 164 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 165 result_str = "succeeded"; 166 #endif 167 chal_sd_config_bus_width((CHAL_HANDLE *) handle->device, 168 width); 169 } else { 170 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 171 result_str = "failed"; 172 #endif 173 } 174 } else { 175 rc = SD_FAIL; 176 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 177 result_str = "ignored"; 178 #endif 179 } 180 181 VERBOSE("SDIO Data Width(%s) %s.\n", bitwidth_str, result_str); 182 183 return rc; 184 } 185 186 187 /* 188 * Error handling routine. Does abort data 189 * transmission if error is found. 190 */ 191 static int abort_err(struct sd_handle *handle) 192 { 193 uint32_t present, options, event, rel = 0; 194 struct sd_resp cmdRsp; 195 196 handle->device->ctrl.argReg = 0; 197 handle->device->ctrl.cmdIndex = SD_CMD_STOP_TRANSMISSION; 198 199 options = (SD_CMD_STOP_TRANSMISSION << 24) | 200 (SD_CMDR_RSP_TYPE_R1b_5b << SD_CMDR_RSP_TYPE_S) | 201 SD4_EMMC_TOP_CMD_CRC_EN_MASK | 202 SD4_EMMC_TOP_CMD_CCHK_EN_MASK; 203 204 chal_sd_send_cmd((CHAL_HANDLE *) handle->device, 205 handle->device->ctrl.cmdIndex, 206 handle->device->ctrl.argReg, options); 207 208 event = wait_for_event(handle, 209 SD4_EMMC_TOP_INTR_CMDDONE_MASK | 210 SD_ERR_INTERRUPTS, 211 handle->device->cfg.wfe_retry); 212 213 if (event & SD_CMD_ERROR_INT) { 214 rel = SD_ERROR_NON_RECOVERABLE; 215 } else { 216 if (event & SD_DAT_TIMEOUT) { 217 return SD_ERROR_NON_RECOVERABLE; 218 } 219 220 chal_sd_get_response((CHAL_HANDLE *) handle->device, 221 (uint32_t *)&cmdRsp); 222 223 process_cmd_response(handle, handle->device->ctrl.cmdIndex, 224 cmdRsp.data.r2.rsp1, cmdRsp.data.r2.rsp2, 225 cmdRsp.data.r2.rsp3, cmdRsp.data.r2.rsp4, 226 &cmdRsp); 227 228 SD_US_DELAY(2000); 229 230 present = 231 chal_sd_get_present_status((CHAL_HANDLE *) handle->device); 232 233 if ((present & 0x00F00000) == 0x00F00000) 234 rel = SD_ERROR_RECOVERABLE; 235 else 236 rel = SD_ERROR_NON_RECOVERABLE; 237 } 238 239 return rel; 240 } 241 242 243 /* 244 * The function handles real data transmission on both DMA and 245 * none DMA mode, In None DMA mode the data transfer starts 246 * when the command is sent to the card, data has to be written 247 * into the host contollers buffer at this time one block 248 * at a time. 249 * In DMA mode, the real data transfer is done by the DMA engine 250 * and this functions just waits for the data transfer to complete. 251 * 252 */ 253 int process_data_xfer(struct sd_handle *handle, uint8_t *buffer, uint32_t addr, 254 uint32_t length, int dir) 255 { 256 if (dir == SD_XFER_HOST_TO_CARD) { 257 #ifdef INCLUDE_EMMC_DRIVER_WRITE_CODE 258 if (handle->device->cfg.dma == SD_DMA_OFF) { 259 /* 260 * In NON DMA mode, the real data xfer starts from here 261 */ 262 if (write_buffer(handle, length, buffer)) 263 return SD_WRITE_ERROR; 264 } else { 265 wait_for_event(handle, 266 SD4_EMMC_TOP_INTR_TXDONE_MASK | 267 SD_ERR_INTERRUPTS, 268 handle->device->cfg.wfe_retry); 269 270 if (handle->device->ctrl.cmdStatus == SD_OK) 271 return SD_OK; 272 273 check_error(handle, handle->device->ctrl.cmdStatus); 274 return SD_WRITE_ERROR; 275 } 276 #else 277 return SD_WRITE_ERROR; 278 #endif 279 } else { /* SD_XFER_CARD_TO_HOST */ 280 281 if (handle->device->cfg.dma == SD_DMA_OFF) { 282 /* In NON DMA mode, the real data 283 * transfer starts from here 284 */ 285 if (read_buffer(handle, length, buffer)) 286 return SD_READ_ERROR; 287 288 } else { /* for DMA mode */ 289 290 /* 291 * once the data transmission is done 292 * copy data to the host buffer. 293 */ 294 wait_for_event(handle, 295 SD4_EMMC_TOP_INTR_TXDONE_MASK | 296 SD_ERR_INTERRUPTS, 297 handle->device->cfg.wfe_retry); 298 299 if (handle->device->ctrl.cmdStatus == SD_OK) 300 return SD_OK; 301 302 check_error(handle, handle->device->ctrl.cmdStatus); 303 return SD_READ_ERROR; 304 } 305 } 306 return SD_OK; 307 } 308 309 310 /* 311 * The function sets block size for the next SD/SDIO/MMC 312 * card read/write command. 313 */ 314 int select_blk_sz(struct sd_handle *handle, uint16_t size) 315 { 316 return sd_cmd16(handle, size); 317 } 318 319 320 /* 321 * The function initalizes the SD/SDIO/MMC/CEATA and detects 322 * the card according to the flag of detection. 323 * Once this function is called, the card is put into ready state 324 * so application can do data transfer to and from the card. 325 */ 326 int init_card(struct sd_handle *handle, int detection) 327 { 328 /* 329 * After Reset, eMMC comes up in 1 Bit Data Width by default. 330 * Set host side to match. 331 */ 332 chal_sd_config_bus_width((CHAL_HANDLE *) handle->device, 333 SD_BUS_DATA_WIDTH_1BIT); 334 335 #ifdef USE_EMMC_FIP_TOC_CACHE 336 cached_partition_block = 0; 337 #endif 338 handle->device->ctrl.present = 0; /* init card present to be no card */ 339 340 init_mmc_card(handle); 341 342 handle->device->ctrl.present = 1; /* card is detected */ 343 344 /* switch the data width back */ 345 if (handle->card->type != SD_CARD_MMC) 346 return SD_FAIL; 347 348 /* 349 * Dynamically set Data Width to highest supported value. 350 * Try different data width settings (highest to lowest). 351 * Verify each setting by reading EXT_CSD and comparing 352 * against the EXT_CSD contents previously read in call to 353 * init_mmc_card() earlier. Stop at first verified data width 354 * setting. 355 */ 356 { 357 #define EXT_CSD_PROPERTIES_SECTION_START_INDEX 192 358 #define EXT_CSD_PROPERTIES_SECTION_END_INDEX 511 359 uint8_t buffer[EXT_CSD_SIZE]; 360 #ifdef DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT 361 /* Try 8 Bit Data Width */ 362 chal_sd_config_bus_width((CHAL_HANDLE *) handle->device, 363 SD_BUS_DATA_WIDTH_8BIT); 364 if ((!set_card_data_width(handle, SD_BUS_DATA_WIDTH_8BIT)) && 365 (!mmc_cmd8(handle, buffer)) && 366 (!memcmp(&buffer[EXT_CSD_PROPERTIES_SECTION_START_INDEX], 367 &(emmc_global_buf_ptr->u.Ext_CSD_storage[EXT_CSD_PROPERTIES_SECTION_START_INDEX]), 368 EXT_CSD_PROPERTIES_SECTION_END_INDEX - EXT_CSD_PROPERTIES_SECTION_START_INDEX + 1))) 369 370 return SD_OK; 371 #endif 372 /* Fall back to 4 Bit Data Width */ 373 chal_sd_config_bus_width((CHAL_HANDLE *) handle->device, 374 SD_BUS_DATA_WIDTH_4BIT); 375 if ((!set_card_data_width(handle, SD_BUS_DATA_WIDTH_4BIT)) && 376 (!mmc_cmd8(handle, buffer)) && 377 (!memcmp(&buffer[EXT_CSD_PROPERTIES_SECTION_START_INDEX], 378 &(emmc_global_buf_ptr->u.Ext_CSD_storage[EXT_CSD_PROPERTIES_SECTION_START_INDEX]), 379 EXT_CSD_PROPERTIES_SECTION_END_INDEX - EXT_CSD_PROPERTIES_SECTION_START_INDEX + 1))) 380 381 return SD_OK; 382 383 /* Fall back to 1 Bit Data Width */ 384 chal_sd_config_bus_width((CHAL_HANDLE *) handle->device, 385 SD_BUS_DATA_WIDTH_1BIT); 386 /* Just use 1 Bit Data Width then. */ 387 if (!set_card_data_width(handle, SD_BUS_DATA_WIDTH_1BIT)) 388 return SD_OK; 389 390 } 391 return SD_CARD_INIT_ERROR; 392 } 393 394 395 /* 396 * The function handles MMC/CEATA card initalization. 397 */ 398 int init_mmc_card(struct sd_handle *handle) 399 { 400 uint32_t ocr = 0, newOcr, rc, limit = 0; 401 uint32_t cmd1_option = 0x40300000; 402 uint32_t sec_count; 403 404 handle->card->type = SD_CARD_MMC; 405 406 do { 407 SD_US_DELAY(1000); 408 newOcr = 0; 409 ocr = 0; 410 rc = sd_cmd1(handle, cmd1_option, &newOcr); 411 limit++; 412 413 if (rc == SD_OK) 414 ocr = newOcr; 415 416 } while (((ocr & SD_CARD_BUSY) == 0) && (limit < SD_CARD_RETRY_LIMIT)); 417 418 if (limit >= SD_CARD_RETRY_LIMIT) { 419 handle->card->type = SD_CARD_UNKNOWN; 420 EMMC_TRACE("CMD1 Timeout: Device is not ready\n"); 421 return SD_CARD_UNKNOWN; 422 } 423 424 /* Save the ocr register */ 425 handle->device->ctrl.ocr = ocr; 426 427 /* Ready State */ 428 rc = sd_cmd2(handle); 429 if (rc != SD_OK) { 430 handle->card->type = SD_CARD_UNKNOWN; 431 return SD_CARD_UNKNOWN; 432 } 433 434 rc = sd_cmd3(handle); 435 if (rc != SD_OK) { 436 handle->card->type = SD_CARD_UNKNOWN; 437 return SD_CARD_UNKNOWN; 438 } 439 /* read CSD */ 440 rc = sd_cmd9(handle, &emmc_global_vars_ptr->cardData); 441 if (rc != SD_OK) { 442 handle->card->type = SD_CARD_UNKNOWN; 443 return SD_CARD_UNKNOWN; 444 } 445 446 /* Increase clock frequency according to what the card advertises */ 447 EMMC_TRACE("From CSD... cardData.csd.mmc.speed = 0x%X\n", 448 emmc_global_vars_ptr->cardData.csd.mmc.speed); 449 process_csd_mmc_speed(handle, 450 emmc_global_vars_ptr->cardData.csd.mmc.speed); 451 452 /* goto transfer mode */ 453 rc = sd_cmd7(handle, handle->device->ctrl.rca); 454 if (rc != SD_OK) { 455 handle->card->type = SD_CARD_UNKNOWN; 456 return SD_CARD_UNKNOWN; 457 } 458 459 rc = mmc_cmd8(handle, emmc_global_buf_ptr->u.Ext_CSD_storage); 460 if (rc == SD_OK) { 461 /* calcul real capacity */ 462 sec_count = emmc_global_buf_ptr->u.Ext_CSD_storage[212] | 463 emmc_global_buf_ptr->u.Ext_CSD_storage[213] << 8 | 464 emmc_global_buf_ptr->u.Ext_CSD_storage[214] << 16 | 465 emmc_global_buf_ptr->u.Ext_CSD_storage[215] << 24; 466 467 EMMC_TRACE("Device density = %ldMBytes\n", 468 handle->card->size / (1024 * 1024)); 469 470 if (sec_count > 0) { 471 handle->card->size = (uint64_t)sec_count * 512; 472 473 EMMC_TRACE("Updated Device density = %ldMBytes\n", 474 handle->card->size / (1024 * 1024)); 475 } 476 477 if (sec_count > (2u * 1024 * 1024 * 1024) / 512) { 478 handle->device->ctrl.ocr |= SD_CARD_HIGH_CAPACITY; 479 handle->device->cfg.blockSize = 512; 480 } 481 482 if (handle->device->ctrl.ocr & SD_CARD_HIGH_CAPACITY) 483 EMMC_TRACE("Sector addressing\n"); 484 else 485 EMMC_TRACE("Byte addressing\n"); 486 487 EMMC_TRACE("Ext_CSD_storage[162]: 0x%02X Ext_CSD_storage[179]: 0x%02X\n", 488 emmc_global_buf_ptr->u.Ext_CSD_storage[162], 489 emmc_global_buf_ptr->u.Ext_CSD_storage[179]); 490 } 491 492 return handle->card->type; 493 } 494 495 496 /* 497 * The function send reset command to the card. 498 * The card will be in ready status after the reset. 499 */ 500 int reset_card(struct sd_handle *handle) 501 { 502 int res = SD_OK; 503 504 /* on reset, card's RCA should return to 0 */ 505 handle->device->ctrl.rca = 0; 506 507 res = sd_cmd0(handle); 508 509 if (res != SD_OK) 510 return SD_RESET_ERROR; 511 512 return res; 513 } 514 515 516 /* 517 * The function sends command to the card and starts 518 * data transmission. 519 */ 520 static int xfer_data(struct sd_handle *handle, 521 uint32_t mode, 522 uint32_t addr, uint32_t length, uint8_t *base) 523 { 524 int rc = SD_OK; 525 526 VERBOSE("XFER: dest: 0x%" PRIx64 ", addr: 0x%x, size: 0x%x bytes\n", 527 (uint64_t)base, addr, length); 528 529 if ((length / handle->device->cfg.blockSize) > 1) { 530 if (mode == SD_OP_READ) { 531 inv_dcache_range((uintptr_t)base, (uint64_t)length); 532 rc = sd_cmd18(handle, addr, length, base); 533 } else { 534 #ifdef INCLUDE_EMMC_DRIVER_WRITE_CODE 535 flush_dcache_range((uintptr_t)base, (uint64_t)length); 536 rc = sd_cmd25(handle, addr, length, base); 537 #else 538 rc = SD_DATA_XFER_ERROR; 539 #endif 540 } 541 } else { 542 if (mode == SD_OP_READ) { 543 inv_dcache_range((uintptr_t)base, (uint64_t)length); 544 rc = sd_cmd17(handle, addr, 545 handle->device->cfg.blockSize, base); 546 } else { 547 #ifdef INCLUDE_EMMC_DRIVER_WRITE_CODE 548 flush_dcache_range((uintptr_t)base, (uint64_t)length); 549 rc = sd_cmd24(handle, addr, 550 handle->device->cfg.blockSize, base); 551 #else 552 rc = SD_DATA_XFER_ERROR; 553 #endif 554 } 555 } 556 557 if (rc != SD_OK) 558 return SD_DATA_XFER_ERROR; 559 560 return SD_OK; 561 } 562 563 #ifdef INCLUDE_EMMC_DRIVER_ERASE_CODE 564 int erase_card(struct sd_handle *handle, uint32_t addr, uint32_t blocks) 565 { 566 uint32_t end_addr; 567 568 INFO("ERASE: addr: 0x%x, num of sectors: 0x%x\n", addr, blocks); 569 570 if (sd_cmd35(handle, addr) != SD_OK) 571 return SD_FAIL; 572 573 end_addr = addr + blocks - 1; 574 if (sd_cmd36(handle, end_addr) != SD_OK) 575 return SD_FAIL; 576 577 if (sd_cmd38(handle) != SD_OK) 578 return SD_FAIL; 579 580 return SD_OK; 581 } 582 #endif 583 584 /* 585 * The function reads block data from a card. 586 */ 587 #ifdef USE_EMMC_FIP_TOC_CACHE 588 int read_block(struct sd_handle *handle, 589 uint8_t *dst, uint32_t addr, uint32_t len) 590 { 591 int rel = SD_OK; 592 593 /* 594 * Avoid doing repeated reads of the partition block 595 * by caching. 596 */ 597 if (cached_partition_block && 598 addr == PARTITION_BLOCK_ADDR && 599 len == CACHE_SIZE) { 600 memcpy(dst, cached_block, len); 601 } else { 602 rel = xfer_data(handle, SD_OP_READ, addr, len, dst); 603 604 if (len == CACHE_SIZE && addr == PARTITION_BLOCK_ADDR) { 605 cached_partition_block = 1; 606 memcpy(cached_block, dst, len); 607 } 608 } 609 610 return rel; 611 } 612 #else 613 int read_block(struct sd_handle *handle, 614 uint8_t *dst, uint32_t addr, uint32_t len) 615 { 616 return xfer_data(handle, SD_OP_READ, addr, len, dst); 617 } 618 #endif 619 620 #ifdef INCLUDE_EMMC_DRIVER_WRITE_CODE 621 622 /* 623 * The function writes block data to a card. 624 */ 625 int write_block(struct sd_handle *handle, 626 uint8_t *src, uint32_t addr, uint32_t len) 627 { 628 int rel = SD_OK; 629 630 /* 631 * Current HC has problem to get response of cmd16 after cmd12, 632 * the delay is necessary to sure the next cmd16 will not be timed out. 633 * The delay has to be at least 4 ms. 634 * The code removed cmd16 and use cmd13 to get card status before 635 * sending cmd18 or cmd25 to make sure the card is ready and thus 636 * no need to have delay here. 637 */ 638 639 rel = xfer_data(handle, SD_OP_WRITE, addr, len, src); 640 641 EMMC_TRACE("wr_blk addr:0x%08X src:0x%08X len:0x%08X result:%d\n", 642 addr, src, len, rel); 643 644 return rel; 645 } 646 647 648 /* 649 * The function is called to write one block data directly to 650 * a card's data buffer. 651 * it is used in Non-DMA mode for card data transmission. 652 */ 653 int write_buffer(struct sd_handle *handle, uint32_t length, uint8_t *data) 654 { 655 uint32_t rem, blockSize, event; 656 uint8_t *pData = data; 657 658 blockSize = handle->device->cfg.blockSize; 659 rem = length; 660 661 if (rem == 0) 662 return SD_OK; 663 664 while (rem > 0) { 665 666 event = wait_for_event(handle, 667 SD4_EMMC_TOP_INTR_BWRDY_MASK | 668 SD_ERR_INTERRUPTS, 669 handle->device->cfg.wfe_retry); 670 671 if (handle->device->ctrl.cmdStatus) { 672 check_error(handle, handle->device->ctrl.cmdStatus); 673 return SD_WRITE_ERROR; 674 } 675 676 if (rem >= blockSize) 677 chal_sd_write_buffer((CHAL_HANDLE *) handle->device, 678 blockSize, pData); 679 else 680 chal_sd_write_buffer((CHAL_HANDLE *) handle->device, 681 rem, pData); 682 683 if (rem > blockSize) { 684 rem -= blockSize; 685 pData += blockSize; 686 } else { 687 pData += rem; 688 rem = 0; 689 } 690 } 691 692 if ((event & SD4_EMMC_TOP_INTR_TXDONE_MASK) != 693 SD4_EMMC_TOP_INTR_TXDONE_MASK) { 694 event = wait_for_event(handle, 695 SD4_EMMC_TOP_INTR_TXDONE_MASK | 696 SD_ERR_INTERRUPTS, 697 handle->device->cfg.wfe_retry); 698 699 if (handle->device->ctrl.cmdStatus != SD_OK) { 700 check_error(handle, handle->device->ctrl.cmdStatus); 701 return SD_WRITE_ERROR; 702 } 703 } else { 704 handle->device->ctrl.eventList &= ~SD4_EMMC_TOP_INTR_TXDONE_MASK; 705 } 706 707 return SD_OK; 708 } 709 #endif /* INCLUDE_EMMC_DRIVER_WRITE_CODE */ 710 711 712 /* 713 * The function is called to read maximal one block data 714 * directly from a card 715 * It is used in Non-DMA mode for card data transmission. 716 */ 717 int read_buffer(struct sd_handle *handle, uint32_t length, uint8_t *data) 718 { 719 uint32_t rem, blockSize, event = 0; 720 uint8_t *pData = data; 721 722 blockSize = handle->device->cfg.blockSize; 723 rem = length; 724 725 if (rem == 0) 726 return SD_OK; 727 728 while (rem > 0) { 729 event = wait_for_event(handle, 730 SD4_EMMC_TOP_INTR_BRRDY_MASK | 731 SD_ERR_INTERRUPTS, 732 handle->device->cfg.wfe_retry); 733 734 if (handle->device->ctrl.cmdStatus) { 735 check_error(handle, handle->device->ctrl.cmdStatus); 736 return SD_READ_ERROR; 737 } 738 739 if (rem >= blockSize) 740 chal_sd_read_buffer((CHAL_HANDLE *) handle->device, 741 blockSize, pData); 742 else 743 chal_sd_read_buffer((CHAL_HANDLE *) handle->device, rem, 744 pData); 745 746 if (rem > blockSize) { 747 rem -= blockSize; 748 pData += blockSize; 749 } else { 750 pData += rem; 751 rem = 0; 752 } 753 } 754 755 /* In case, there are extra data in the SD FIFO, just dump them. */ 756 chal_sd_dump_fifo((CHAL_HANDLE *) handle->device); 757 758 if ((event & SD4_EMMC_TOP_INTR_TXDONE_MASK) != 759 SD4_EMMC_TOP_INTR_TXDONE_MASK) { 760 event = wait_for_event(handle, SD4_EMMC_TOP_INTR_TXDONE_MASK, 761 handle->device->cfg.wfe_retry); 762 763 if (handle->device->ctrl.cmdStatus) { 764 check_error(handle, handle->device->ctrl.cmdStatus); 765 return SD_READ_ERROR; 766 } 767 } else { 768 handle->device->ctrl.eventList &= ~SD4_EMMC_TOP_INTR_TXDONE_MASK; 769 } 770 771 return SD_OK; 772 } 773 774 775 /* 776 * Error handling routine. 777 * The function just reset the DAT 778 * and CMD line if an error occures during data transmission. 779 */ 780 int check_error(struct sd_handle *handle, uint32_t ints) 781 { 782 uint32_t rel; 783 784 chal_sd_set_irq_signal((CHAL_HANDLE *) handle->device, 785 SD_ERR_INTERRUPTS, 0); 786 787 if (ints & SD4_EMMC_TOP_INTR_CMDERROR_MASK) { 788 789 chal_sd_reset_line((CHAL_HANDLE *) handle->device, 790 SD4_EMMC_TOP_CTRL1_CMDRST_MASK); 791 rel = abort_err(handle); 792 793 chal_sd_reset_line((CHAL_HANDLE *) handle->device, 794 SD4_EMMC_TOP_CTRL1_DATRST_MASK); 795 chal_sd_set_irq_signal((CHAL_HANDLE *) handle->device, 796 SD_ERR_INTERRUPTS, 1); 797 798 return (rel == SD_ERROR_NON_RECOVERABLE) ? 799 SD_ERROR_NON_RECOVERABLE : SD_ERROR_RECOVERABLE; 800 } else { 801 rel = err_recovery(handle, ints); 802 } 803 804 chal_sd_set_irq_signal((CHAL_HANDLE *) handle->device, 805 SD_ERR_INTERRUPTS, 1); 806 807 return rel; 808 } 809 810 811 /* 812 * Error recovery routine. 813 * Try to recover from the error. 814 */ 815 static int err_recovery(struct sd_handle *handle, uint32_t errors) 816 { 817 uint32_t rel = 0; 818 819 /* 820 * In case of timeout error, the cmd line and data line maybe 821 * still active or stuck at atcitve so it is needed to reset 822 * either data line or cmd line to make sure a new cmd can be sent. 823 */ 824 825 if (errors & SD_CMD_ERROR_INT) 826 chal_sd_reset_line((CHAL_HANDLE *) handle->device, 827 SD4_EMMC_TOP_CTRL1_CMDRST_MASK); 828 829 if (errors & SD_DAT_ERROR_INT) 830 chal_sd_reset_line((CHAL_HANDLE *) handle->device, 831 SD4_EMMC_TOP_CTRL1_DATRST_MASK); 832 833 /* Abort transaction by sending out stop command */ 834 if ((handle->device->ctrl.cmdIndex == 18) || 835 (handle->device->ctrl.cmdIndex == 25)) 836 rel = abort_err(handle); 837 838 return rel; 839 } 840 841 842 /* 843 * The function is called to read one block data directly from a card. 844 * It is used in Non-DMA mode for card data transmission. 845 */ 846 int process_cmd_response(struct sd_handle *handle, 847 uint32_t cmdIndex, 848 uint32_t rsp0, 849 uint32_t rsp1, 850 uint32_t rsp2, uint32_t rsp3, struct sd_resp *resp) 851 { 852 int result = SD_OK; 853 854 /* R6 */ 855 uint32_t rca = (rsp0 >> 16) & 0xffff; 856 uint32_t cardStatus = rsp0; 857 858 /* R4 */ 859 uint32_t cBit = (rsp0 >> 31) & 0x1; 860 uint32_t funcs = (rsp0 >> 28) & 0x7; 861 uint32_t memPresent = (rsp0 >> 27) & 0x1; 862 863 resp->r1 = 0x3f; 864 resp->cardStatus = cardStatus; 865 866 if (cmdIndex == SD_CMD_IO_SEND_OP_COND) { 867 resp->data.r4.cardReady = cBit; 868 resp->data.r4.funcs = funcs; 869 resp->data.r4.memPresent = memPresent; 870 resp->data.r4.ocr = cardStatus; 871 } 872 873 if (cmdIndex == SD_CMD_MMC_SET_RCA) { 874 resp->data.r6.rca = rca; 875 resp->data.r6.cardStatus = cardStatus & 0xFFFF; 876 } 877 878 if (cmdIndex == SD_CMD_SELECT_DESELECT_CARD) { 879 resp->data.r7.rca = rca; 880 } 881 882 if (cmdIndex == SD_CMD_IO_RW_DIRECT) { 883 if (((rsp0 >> 16) & 0xffff) != 0) 884 result = SD_CMD_ERR_INVALID_RESPONSE; 885 886 resp->data.r5.data = rsp0 & 0xff; 887 } 888 889 if (cmdIndex == SD_CMD_IO_RW_EXTENDED) { 890 if (((rsp0 >> 16) & 0xffff) != 0) 891 result = SD_CMD_ERR_INVALID_RESPONSE; 892 893 resp->data.r5.data = rsp0 & 0xff; 894 } 895 896 if (cmdIndex == SD_ACMD_SD_SEND_OP_COND || 897 cmdIndex == SD_CMD_SEND_OPCOND) 898 resp->data.r3.ocr = cardStatus; 899 900 if (cmdIndex == SD_CMD_SEND_CSD || 901 cmdIndex == SD_CMD_SEND_CID || 902 cmdIndex == SD_CMD_ALL_SEND_CID) { 903 resp->data.r2.rsp4 = rsp3; 904 resp->data.r2.rsp3 = rsp2; 905 resp->data.r2.rsp2 = rsp1; 906 resp->data.r2.rsp1 = rsp0; 907 } 908 909 if ((cmdIndex == SD_CMD_READ_EXT_CSD) && 910 (handle->card->type == SD_CARD_SD)) { 911 if ((resp->cardStatus & 0xAA) != 0xAA) { 912 result = SD_CMD_ERR_INVALID_RESPONSE; 913 } 914 } 915 916 return result; 917 } 918 919 920 /* 921 * The function sets DMA buffer and data length, process 922 * block size and the number of blocks to be transferred. 923 * It returns the DMA buffer address. 924 * It copies dma data from user buffer to the DMA buffer 925 * if the operation is to write data to the SD card. 926 */ 927 void data_xfer_setup(struct sd_handle *handle, uint8_t *data, uint32_t length, 928 int dir) 929 { 930 chal_sd_setup_xfer((CHAL_HANDLE *)handle->device, data, length, dir); 931 } 932 933 934 /* 935 * The function does soft reset the host SD controller. After 936 * the function call all host controller's register are reset 937 * to default vallue; 938 * 939 * Note This function only resets the host controller it does not 940 * reset the controller's handler. 941 */ 942 int reset_host_ctrl(struct sd_handle *handle) 943 { 944 chal_sd_stop(); 945 946 return SD_OK; 947 } 948 949 static void pstate_log(struct sd_handle *handle) 950 { 951 ERROR("PSTATE: 0x%x\n", mmio_read_32 952 (handle->device->ctrl.sdRegBaseAddr + 953 SD4_EMMC_TOP_PSTATE_SD4_OFFSET)); 954 ERROR("ERRSTAT: 0x%x\n", mmio_read_32 955 (handle->device->ctrl.sdRegBaseAddr + 956 SD4_EMMC_TOP_ERRSTAT_OFFSET)); 957 } 958 959 /* 960 * The function waits for one or a group of interrupts specified 961 * by mask. The function returns if any one the interrupt status 962 * is set. If interrupt mode is not enabled then it will poll 963 * the interrupt status register until a interrupt status is set 964 * an error interrupt happens. If interrupt mode is enabled then 965 * this function should be called after the interrupt 966 * is received by ISR routine. 967 */ 968 uint32_t wait_for_event(struct sd_handle *handle, 969 uint32_t mask, uint32_t retry) 970 { 971 uint32_t regval, cmd12, time = 0; 972 973 handle->device->ctrl.cmdStatus = 0; /* no error */ 974 EMMC_TRACE("%s %d mask:0x%x timeout:%d irq_status:0x%x\n", 975 __func__, __LINE__, mask, retry, 976 chal_sd_get_irq_status((CHAL_HANDLE *)handle->device)); 977 978 /* Polling mode */ 979 do { 980 regval = chal_sd_get_irq_status((CHAL_HANDLE *)handle->device); 981 982 if (regval & SD4_EMMC_TOP_INTR_DMAIRQ_MASK) { 983 chal_sd_set_dma_addr((CHAL_HANDLE *)handle->device, 984 (uintptr_t) 985 chal_sd_get_dma_addr((CHAL_HANDLE *) 986 handle->device)); 987 chal_sd_clear_irq((CHAL_HANDLE *)handle->device, 988 SD4_EMMC_TOP_INTR_DMAIRQ_MASK); 989 } 990 991 if (time++ > retry) { 992 ERROR("EMMC: No response (cmd%d) after %dus.\n", 993 handle->device->ctrl.cmdIndex, 994 time * EMMC_WFE_RETRY_DELAY_US); 995 handle->device->ctrl.cmdStatus = SD_CMD_MISSING; 996 pstate_log(handle); 997 ERROR("EMMC: INT[0x%x]\n", regval); 998 break; 999 } 1000 1001 if (regval & SD4_EMMC_TOP_INTR_CTOERR_MASK) { 1002 ERROR("EMMC: Cmd%d timeout INT[0x%x]\n", 1003 handle->device->ctrl.cmdIndex, regval); 1004 handle->device->ctrl.cmdStatus = 1005 SD4_EMMC_TOP_INTR_CTOERR_MASK; 1006 pstate_log(handle); 1007 break; 1008 } 1009 if (regval & SD_CMD_ERROR_FLAGS) { 1010 ERROR("EMMC: Cmd%d error INT[0x%x]\n", 1011 handle->device->ctrl.cmdIndex, regval); 1012 handle->device->ctrl.cmdStatus = SD_CMD_ERROR_FLAGS; 1013 pstate_log(handle); 1014 break; 1015 } 1016 1017 cmd12 = chal_sd_get_atuo12_error((CHAL_HANDLE *)handle->device); 1018 if (cmd12) { 1019 ERROR("EMMC: Cmd%d auto cmd12 err:0x%x\n", 1020 handle->device->ctrl.cmdIndex, cmd12); 1021 handle->device->ctrl.cmdStatus = cmd12; 1022 pstate_log(handle); 1023 break; 1024 } 1025 1026 if (SD_DATA_ERROR_FLAGS & regval) { 1027 ERROR("EMMC: Data for cmd%d error, INT[0x%x]\n", 1028 handle->device->ctrl.cmdIndex, regval); 1029 handle->device->ctrl.cmdStatus = 1030 (SD_DATA_ERROR_FLAGS & regval); 1031 pstate_log(handle); 1032 break; 1033 } 1034 1035 if ((regval & mask) == 0) 1036 udelay(EMMC_WFE_RETRY_DELAY_US); 1037 1038 } while ((regval & mask) == 0); 1039 1040 /* clear the interrupt since it is processed */ 1041 chal_sd_clear_irq((CHAL_HANDLE *)handle->device, (regval & mask)); 1042 1043 return (regval & mask); 1044 } 1045 1046 int32_t set_config(struct sd_handle *handle, uint32_t speed, uint32_t retry, 1047 uint32_t dma, uint32_t dmaBound, uint32_t blkSize, 1048 uint32_t wfe_retry) 1049 { 1050 int32_t rel = 0; 1051 1052 if (handle == NULL) 1053 return SD_FAIL; 1054 1055 handle->device->cfg.wfe_retry = wfe_retry; 1056 1057 rel = chal_sd_config((CHAL_HANDLE *)handle->device, speed, retry, 1058 dmaBound, blkSize, dma); 1059 return rel; 1060 1061 } 1062 1063 int mmc_cmd1(struct sd_handle *handle) 1064 { 1065 uint32_t newOcr, res; 1066 uint32_t cmd1_option = MMC_OCR_OP_VOLT | MMC_OCR_SECTOR_ACCESS_MODE; 1067 1068 /* 1069 * After Reset, eMMC comes up in 1 Bit Data Width by default. 1070 * Set host side to match. 1071 */ 1072 chal_sd_config_bus_width((CHAL_HANDLE *) handle->device, 1073 SD_BUS_DATA_WIDTH_1BIT); 1074 1075 #ifdef USE_EMMC_FIP_TOC_CACHE 1076 cached_partition_block = 0; 1077 #endif 1078 handle->device->ctrl.present = 0; /* init card present to be no card */ 1079 1080 handle->card->type = SD_CARD_MMC; 1081 1082 res = sd_cmd1(handle, cmd1_option, &newOcr); 1083 1084 if (res != SD_OK) { 1085 EMMC_TRACE("CMD1 Timeout: Device is not ready\n"); 1086 res = SD_CARD_UNKNOWN; 1087 } 1088 return res; 1089 } 1090