1 /* 2 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch_helpers.h> 11 #include <common/debug.h> 12 #include <common/desc_image_load.h> 13 #include <drivers/fwu/fwu.h> 14 #include <drivers/fwu/fwu_metadata.h> 15 #include <drivers/io/io_block.h> 16 #include <drivers/io/io_driver.h> 17 #include <drivers/io/io_fip.h> 18 #include <drivers/io/io_memmap.h> 19 #include <drivers/io/io_mtd.h> 20 #include <drivers/io/io_storage.h> 21 #include <drivers/mmc.h> 22 #include <drivers/partition/efi.h> 23 #include <drivers/partition/partition.h> 24 #include <drivers/raw_nand.h> 25 #include <drivers/spi_nand.h> 26 #include <drivers/spi_nor.h> 27 #include <drivers/st/io_mmc.h> 28 #include <drivers/st/stm32_fmc2_nand.h> 29 #include <drivers/st/stm32_qspi.h> 30 #include <drivers/st/stm32_sdmmc2.h> 31 #include <drivers/usb_device.h> 32 #include <lib/fconf/fconf.h> 33 #include <lib/mmio.h> 34 #include <lib/utils.h> 35 #include <plat/common/platform.h> 36 #include <tools_share/firmware_image_package.h> 37 38 #include <platform_def.h> 39 #include <stm32cubeprogrammer.h> 40 #include <stm32mp_efi.h> 41 #include <stm32mp_fconf_getter.h> 42 #include <stm32mp_io_storage.h> 43 #include <usb_dfu.h> 44 45 /* IO devices */ 46 uintptr_t fip_dev_handle; 47 uintptr_t storage_dev_handle; 48 49 static const io_dev_connector_t *fip_dev_con; 50 51 #if STM32MP_SDMMC || STM32MP_EMMC 52 static struct mmc_device_info mmc_info; 53 54 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE); 55 56 static io_block_dev_spec_t mmc_block_dev_spec = { 57 /* It's used as temp buffer in block driver */ 58 .buffer = { 59 .offset = (size_t)&block_buffer, 60 .length = MMC_BLOCK_SIZE, 61 }, 62 .ops = { 63 .read = mmc_read_blocks, 64 .write = NULL, 65 }, 66 .block_size = MMC_BLOCK_SIZE, 67 }; 68 69 static const io_dev_connector_t *mmc_dev_con; 70 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 71 72 #if STM32MP_SPI_NOR 73 static io_mtd_dev_spec_t spi_nor_dev_spec = { 74 .ops = { 75 .init = spi_nor_init, 76 .read = spi_nor_read, 77 }, 78 }; 79 #endif 80 81 #if STM32MP_RAW_NAND 82 static io_mtd_dev_spec_t nand_dev_spec = { 83 .ops = { 84 .init = nand_raw_init, 85 .read = nand_read, 86 .seek = nand_seek_bb 87 }, 88 }; 89 90 static const io_dev_connector_t *nand_dev_con; 91 #endif 92 93 #if STM32MP_SPI_NAND 94 static io_mtd_dev_spec_t spi_nand_dev_spec = { 95 .ops = { 96 .init = spi_nand_init, 97 .read = nand_read, 98 .seek = nand_seek_bb 99 }, 100 }; 101 #endif 102 103 #if STM32MP_SPI_NAND || STM32MP_SPI_NOR 104 static const io_dev_connector_t *spi_dev_con; 105 #endif 106 107 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 108 static const io_dev_connector_t *memmap_dev_con; 109 #endif 110 111 io_block_spec_t image_block_spec = { 112 .offset = 0U, 113 .length = 0U, 114 }; 115 116 int open_fip(const uintptr_t spec) 117 { 118 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID); 119 } 120 121 int open_storage(const uintptr_t spec) 122 { 123 return io_dev_init(storage_dev_handle, 0); 124 } 125 126 #if STM32MP_EMMC_BOOT 127 static uint32_t get_boot_part_fip_header(void) 128 { 129 io_block_spec_t emmc_boot_fip_block_spec = { 130 .offset = STM32MP_EMMC_BOOT_FIP_OFFSET, 131 .length = MMC_BLOCK_SIZE, /* We are interested only in first 4 bytes */ 132 }; 133 uint32_t magic = 0U; 134 int io_result; 135 size_t bytes_read; 136 uintptr_t fip_hdr_handle; 137 138 io_result = io_open(storage_dev_handle, (uintptr_t)&emmc_boot_fip_block_spec, 139 &fip_hdr_handle); 140 assert(io_result == 0); 141 142 io_result = io_read(fip_hdr_handle, (uintptr_t)&magic, sizeof(magic), 143 &bytes_read); 144 if ((io_result != 0) || (bytes_read != sizeof(magic))) { 145 panic(); 146 } 147 148 io_close(fip_hdr_handle); 149 150 VERBOSE("%s: eMMC boot magic at offset 256K: %08x\n", 151 __func__, magic); 152 153 return magic; 154 } 155 #endif 156 157 static void print_boot_device(boot_api_context_t *boot_context) 158 { 159 switch (boot_context->boot_interface_selected) { 160 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 161 INFO("Using SDMMC\n"); 162 break; 163 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 164 INFO("Using EMMC\n"); 165 break; 166 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 167 INFO("Using QSPI NOR\n"); 168 break; 169 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 170 INFO("Using FMC NAND\n"); 171 break; 172 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 173 INFO("Using SPI NAND\n"); 174 break; 175 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 176 INFO("Using UART\n"); 177 break; 178 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 179 INFO("Using USB\n"); 180 break; 181 default: 182 ERROR("Boot interface %u not found\n", 183 boot_context->boot_interface_selected); 184 panic(); 185 break; 186 } 187 188 if (boot_context->boot_interface_instance != 0U) { 189 INFO(" Instance %d\n", boot_context->boot_interface_instance); 190 } 191 } 192 193 #if STM32MP_SDMMC || STM32MP_EMMC 194 static void boot_mmc(enum mmc_device_type mmc_dev_type, 195 uint16_t boot_interface_instance) 196 { 197 int io_result __unused; 198 struct stm32_sdmmc2_params params; 199 200 zeromem(¶ms, sizeof(struct stm32_sdmmc2_params)); 201 202 mmc_info.mmc_dev_type = mmc_dev_type; 203 204 switch (boot_interface_instance) { 205 case 1: 206 params.reg_base = STM32MP_SDMMC1_BASE; 207 break; 208 case 2: 209 params.reg_base = STM32MP_SDMMC2_BASE; 210 break; 211 case 3: 212 params.reg_base = STM32MP_SDMMC3_BASE; 213 break; 214 default: 215 WARN("SDMMC instance not found, using default\n"); 216 if (mmc_dev_type == MMC_IS_SD) { 217 params.reg_base = STM32MP_SDMMC1_BASE; 218 } else { 219 params.reg_base = STM32MP_SDMMC2_BASE; 220 } 221 break; 222 } 223 224 if (mmc_dev_type != MMC_IS_EMMC) { 225 params.flags = MMC_FLAG_SD_CMD6; 226 } 227 228 params.device_info = &mmc_info; 229 if (stm32_sdmmc2_mmc_init(¶ms) != 0) { 230 ERROR("SDMMC%u init failed\n", boot_interface_instance); 231 panic(); 232 } 233 234 /* Open MMC as a block device to read FIP */ 235 io_result = register_io_dev_block(&mmc_dev_con); 236 if (io_result != 0) { 237 panic(); 238 } 239 240 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec, 241 &storage_dev_handle); 242 assert(io_result == 0); 243 244 #if STM32MP_EMMC_BOOT 245 if (mmc_dev_type == MMC_IS_EMMC) { 246 io_result = mmc_part_switch_current_boot(); 247 assert(io_result == 0); 248 249 if (get_boot_part_fip_header() != TOC_HEADER_NAME) { 250 WARN("%s: Can't find FIP header on eMMC boot partition. Trying GPT\n", 251 __func__); 252 io_result = mmc_part_switch_user(); 253 assert(io_result == 0); 254 return; 255 } 256 257 VERBOSE("%s: FIP header found on eMMC boot partition\n", 258 __func__); 259 image_block_spec.offset = STM32MP_EMMC_BOOT_FIP_OFFSET; 260 image_block_spec.length = mmc_boot_part_size() - STM32MP_EMMC_BOOT_FIP_OFFSET; 261 } 262 #endif 263 } 264 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 265 266 #if STM32MP_SPI_NOR 267 static void boot_spi_nor(boot_api_context_t *boot_context) 268 { 269 int io_result __unused; 270 271 io_result = stm32_qspi_init(); 272 assert(io_result == 0); 273 274 io_result = register_io_dev_mtd(&spi_dev_con); 275 assert(io_result == 0); 276 277 /* Open connections to device */ 278 io_result = io_dev_open(spi_dev_con, 279 (uintptr_t)&spi_nor_dev_spec, 280 &storage_dev_handle); 281 assert(io_result == 0); 282 } 283 #endif /* STM32MP_SPI_NOR */ 284 285 #if STM32MP_RAW_NAND 286 static void boot_fmc2_nand(boot_api_context_t *boot_context) 287 { 288 int io_result __unused; 289 290 io_result = stm32_fmc2_init(); 291 assert(io_result == 0); 292 293 /* Register the IO device on this platform */ 294 io_result = register_io_dev_mtd(&nand_dev_con); 295 assert(io_result == 0); 296 297 /* Open connections to device */ 298 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec, 299 &storage_dev_handle); 300 assert(io_result == 0); 301 } 302 #endif /* STM32MP_RAW_NAND */ 303 304 #if STM32MP_SPI_NAND 305 static void boot_spi_nand(boot_api_context_t *boot_context) 306 { 307 int io_result __unused; 308 309 io_result = stm32_qspi_init(); 310 assert(io_result == 0); 311 312 io_result = register_io_dev_mtd(&spi_dev_con); 313 assert(io_result == 0); 314 315 /* Open connections to device */ 316 io_result = io_dev_open(spi_dev_con, 317 (uintptr_t)&spi_nand_dev_spec, 318 &storage_dev_handle); 319 assert(io_result == 0); 320 } 321 #endif /* STM32MP_SPI_NAND */ 322 323 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 324 static void mmap_io_setup(void) 325 { 326 int io_result __unused; 327 328 io_result = register_io_dev_memmap(&memmap_dev_con); 329 assert(io_result == 0); 330 331 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL, 332 &storage_dev_handle); 333 assert(io_result == 0); 334 } 335 336 #if STM32MP_UART_PROGRAMMER 337 static void stm32cubeprogrammer_uart(void) 338 { 339 int ret __unused; 340 boot_api_context_t *boot_context = 341 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 342 uintptr_t uart_base; 343 344 uart_base = get_uart_address(boot_context->boot_interface_instance); 345 ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 346 assert(ret == 0); 347 } 348 #endif 349 350 #if STM32MP_USB_PROGRAMMER 351 static void stm32cubeprogrammer_usb(void) 352 { 353 int ret __unused; 354 struct usb_handle *pdev; 355 356 /* Init USB on platform */ 357 pdev = usb_dfu_plat_init(); 358 359 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 360 assert(ret == 0); 361 } 362 #endif 363 #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */ 364 365 366 void stm32mp_io_setup(void) 367 { 368 int io_result __unused; 369 boot_api_context_t *boot_context = 370 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 371 372 print_boot_device(boot_context); 373 374 if ((boot_context->boot_partition_used_toboot == 1U) || 375 (boot_context->boot_partition_used_toboot == 2U)) { 376 INFO("Boot used partition fsbl%u\n", 377 boot_context->boot_partition_used_toboot); 378 } 379 380 io_result = register_io_dev_fip(&fip_dev_con); 381 assert(io_result == 0); 382 383 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL, 384 &fip_dev_handle); 385 386 switch (boot_context->boot_interface_selected) { 387 #if STM32MP_SDMMC 388 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 389 dmbsy(); 390 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance); 391 break; 392 #endif 393 #if STM32MP_EMMC 394 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 395 dmbsy(); 396 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance); 397 break; 398 #endif 399 #if STM32MP_SPI_NOR 400 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 401 dmbsy(); 402 boot_spi_nor(boot_context); 403 break; 404 #endif 405 #if STM32MP_RAW_NAND 406 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 407 dmbsy(); 408 boot_fmc2_nand(boot_context); 409 break; 410 #endif 411 #if STM32MP_SPI_NAND 412 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 413 dmbsy(); 414 boot_spi_nand(boot_context); 415 break; 416 #endif 417 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 418 #if STM32MP_UART_PROGRAMMER 419 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 420 #endif 421 #if STM32MP_USB_PROGRAMMER 422 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 423 #endif 424 dmbsy(); 425 mmap_io_setup(); 426 break; 427 #endif 428 429 default: 430 ERROR("Boot interface %d not supported\n", 431 boot_context->boot_interface_selected); 432 panic(); 433 break; 434 } 435 } 436 437 int bl2_plat_handle_pre_image_load(unsigned int image_id) 438 { 439 static bool gpt_init_done __unused; 440 uint16_t boot_itf = stm32mp_get_boot_itf_selected(); 441 442 switch (boot_itf) { 443 #if STM32MP_SDMMC || STM32MP_EMMC 444 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 445 #if STM32MP_EMMC_BOOT 446 if (image_block_spec.offset == STM32MP_EMMC_BOOT_FIP_OFFSET) { 447 break; 448 } 449 #endif 450 /* fallthrough */ 451 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 452 if (!gpt_init_done) { 453 /* 454 * With FWU Multi Bank feature enabled, the selection of 455 * the image to boot will be done by fwu_init calling the 456 * platform hook, plat_fwu_set_images_source. 457 */ 458 #if !PSA_FWU_SUPPORT 459 const partition_entry_t *entry; 460 const struct efi_guid img_type_guid = STM32MP_FIP_GUID; 461 uuid_t img_type_uuid; 462 463 guidcpy(&img_type_uuid, &img_type_guid); 464 partition_init(GPT_IMAGE_ID); 465 entry = get_partition_entry_by_type(&img_type_uuid); 466 if (entry == NULL) { 467 entry = get_partition_entry(FIP_IMAGE_NAME); 468 if (entry == NULL) { 469 ERROR("Could NOT find the %s partition!\n", 470 FIP_IMAGE_NAME); 471 472 return -ENOENT; 473 } 474 } 475 476 image_block_spec.offset = entry->start; 477 image_block_spec.length = entry->length; 478 #endif 479 gpt_init_done = true; 480 } else { 481 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 482 assert(bl_mem_params != NULL); 483 484 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base; 485 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size; 486 } 487 488 break; 489 #endif 490 491 #if STM32MP_RAW_NAND || STM32MP_SPI_NAND 492 #if STM32MP_RAW_NAND 493 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 494 #endif 495 #if STM32MP_SPI_NAND 496 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 497 #endif 498 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET; 499 break; 500 #endif 501 502 #if STM32MP_SPI_NOR 503 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 504 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET; 505 break; 506 #endif 507 508 #if STM32MP_UART_PROGRAMMER 509 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 510 if (image_id == FW_CONFIG_ID) { 511 stm32cubeprogrammer_uart(); 512 /* FIP loaded at DWL address */ 513 image_block_spec.offset = DWL_BUFFER_BASE; 514 image_block_spec.length = DWL_BUFFER_SIZE; 515 } 516 break; 517 #endif 518 #if STM32MP_USB_PROGRAMMER 519 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 520 if (image_id == FW_CONFIG_ID) { 521 stm32cubeprogrammer_usb(); 522 /* FIP loaded at DWL address */ 523 image_block_spec.offset = DWL_BUFFER_BASE; 524 image_block_spec.length = DWL_BUFFER_SIZE; 525 } 526 break; 527 #endif 528 529 default: 530 ERROR("FIP Not found\n"); 531 panic(); 532 } 533 534 return 0; 535 } 536 537 /* 538 * Return an IO device handle and specification which can be used to access 539 * an image. Use this to enforce platform load policy. 540 */ 541 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, 542 uintptr_t *image_spec) 543 { 544 int rc; 545 const struct plat_io_policy *policy; 546 547 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id); 548 rc = policy->check(policy->image_spec); 549 if (rc == 0) { 550 *image_spec = policy->image_spec; 551 *dev_handle = *(policy->dev_handle); 552 } 553 554 return rc; 555 } 556 557 #if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT 558 /* 559 * In each boot in non-trial mode, we set the BKP register to 560 * FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata. 561 * 562 * As long as the update agent didn't update the "accepted" field in metadata 563 * (i.e. we are in trial mode), we select the new active_index. 564 * To avoid infinite boot loop at trial boot we decrement a BKP register. 565 * If this counter is 0: 566 * - an unexpected TAMPER event raised (that resets the BKP registers to 0) 567 * - a power-off occurs before the update agent was able to update the 568 * "accepted' field 569 * - we already boot FWU_MAX_TRIAL_REBOOT times in trial mode. 570 * we select the previous_active_index. 571 */ 572 #define INVALID_BOOT_IDX 0xFFFFFFFF 573 574 uint32_t plat_fwu_get_boot_idx(void) 575 { 576 /* 577 * Select boot index and update boot counter only once per boot 578 * even if this function is called several times. 579 */ 580 static uint32_t boot_idx = INVALID_BOOT_IDX; 581 const struct fwu_metadata *data; 582 583 data = fwu_get_metadata(); 584 585 if (boot_idx == INVALID_BOOT_IDX) { 586 boot_idx = data->active_index; 587 if (fwu_is_trial_run_state()) { 588 if (stm32_get_and_dec_fwu_trial_boot_cnt() == 0U) { 589 WARN("Trial FWU fails %u times\n", 590 FWU_MAX_TRIAL_REBOOT); 591 boot_idx = data->previous_active_index; 592 } 593 } else { 594 stm32_set_max_fwu_trial_boot_cnt(); 595 } 596 } 597 598 return boot_idx; 599 } 600 601 static void *stm32_get_image_spec(const uuid_t *img_type_uuid) 602 { 603 unsigned int i; 604 605 for (i = 0U; i < MAX_NUMBER_IDS; i++) { 606 if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) { 607 return (void *)policies[i].image_spec; 608 } 609 } 610 611 return NULL; 612 } 613 614 void plat_fwu_set_images_source(const struct fwu_metadata *metadata) 615 { 616 unsigned int i; 617 uint32_t boot_idx; 618 const partition_entry_t *entry; 619 const uuid_t *img_type_uuid, *img_uuid; 620 io_block_spec_t *image_spec; 621 622 boot_idx = plat_fwu_get_boot_idx(); 623 assert(boot_idx < NR_OF_FW_BANKS); 624 625 for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) { 626 img_type_uuid = &metadata->img_entry[i].img_type_uuid; 627 image_spec = stm32_get_image_spec(img_type_uuid); 628 if (image_spec == NULL) { 629 ERROR("Unable to get image spec for the image in the metadata\n"); 630 panic(); 631 } 632 633 img_uuid = 634 &metadata->img_entry[i].img_props[boot_idx].img_uuid; 635 636 entry = get_partition_entry_by_uuid(img_uuid); 637 if (entry == NULL) { 638 ERROR("Unable to find the partition with the uuid mentioned in metadata\n"); 639 panic(); 640 } 641 642 image_spec->offset = entry->start; 643 image_spec->length = entry->length; 644 } 645 } 646 647 static int plat_set_image_source(unsigned int image_id, 648 uintptr_t *handle, 649 uintptr_t *image_spec, 650 const char *part_name) 651 { 652 struct plat_io_policy *policy; 653 io_block_spec_t *spec; 654 const partition_entry_t *entry = get_partition_entry(part_name); 655 656 if (entry == NULL) { 657 ERROR("Unable to find the %s partition\n", part_name); 658 return -ENOENT; 659 } 660 661 policy = &policies[image_id]; 662 663 spec = (io_block_spec_t *)policy->image_spec; 664 spec->offset = entry->start; 665 spec->length = entry->length; 666 667 *image_spec = policy->image_spec; 668 *handle = *policy->dev_handle; 669 670 return 0; 671 } 672 673 int plat_fwu_set_metadata_image_source(unsigned int image_id, 674 uintptr_t *handle, 675 uintptr_t *image_spec) 676 { 677 char *part_name; 678 679 assert((image_id == FWU_METADATA_IMAGE_ID) || 680 (image_id == BKUP_FWU_METADATA_IMAGE_ID)); 681 682 partition_init(GPT_IMAGE_ID); 683 684 if (image_id == FWU_METADATA_IMAGE_ID) { 685 part_name = METADATA_PART_1; 686 } else { 687 part_name = METADATA_PART_2; 688 } 689 690 return plat_set_image_source(image_id, handle, image_spec, 691 part_name); 692 } 693 #endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */ 694