1 /* 2 * Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <assert.h> 7 #include <stdint.h> 8 9 #include <platform_def.h> 10 11 #include <drivers/clk.h> 12 #include <drivers/scmi-msg.h> 13 #include <drivers/scmi.h> 14 #include <drivers/st/stm32mp1_clk.h> 15 #include <drivers/st/stm32mp_reset.h> 16 #include <dt-bindings/clock/stm32mp1-clks.h> 17 #include <dt-bindings/reset/stm32mp1-resets.h> 18 19 #define TIMEOUT_US_1MS 1000U 20 21 #define SCMI_CLOCK_NAME_SIZE 16U 22 #define SCMI_RSTD_NAME_SIZE 16U 23 24 /* 25 * struct stm32_scmi_clk - Data for the exposed clock 26 * @clock_id: Clock identifier in RCC clock driver 27 * @name: Clock string ID exposed to agent 28 * @enabled: State of the SCMI clock 29 */ 30 struct stm32_scmi_clk { 31 unsigned long clock_id; 32 const char *name; 33 bool enabled; 34 }; 35 36 /* 37 * struct stm32_scmi_rstd - Data for the exposed reset controller 38 * @reset_id: Reset identifier in RCC reset driver 39 * @name: Reset string ID exposed to agent 40 */ 41 struct stm32_scmi_rstd { 42 unsigned long reset_id; 43 const char *name; 44 }; 45 46 /* Locate all non-secure SMT message buffers in last page of SYSRAM */ 47 #define SMT_BUFFER_BASE STM32MP_SCMI_NS_SHM_BASE 48 #define SMT_BUFFER0_BASE SMT_BUFFER_BASE 49 #define SMT_BUFFER1_BASE (SMT_BUFFER_BASE + 0x200) 50 51 CASSERT((STM32MP_SCMI_NS_SHM_BASE + STM32MP_SCMI_NS_SHM_SIZE) >= 52 (SMT_BUFFER1_BASE + SMT_BUF_SLOT_SIZE), 53 assert_scmi_non_secure_shm_fits_scmi_overall_buffer_size); 54 55 static struct scmi_msg_channel scmi_channel[] = { 56 [0] = { 57 .shm_addr = SMT_BUFFER0_BASE, 58 .shm_size = SMT_BUF_SLOT_SIZE, 59 }, 60 [1] = { 61 .shm_addr = SMT_BUFFER1_BASE, 62 .shm_size = SMT_BUF_SLOT_SIZE, 63 }, 64 }; 65 66 struct scmi_msg_channel *plat_scmi_get_channel(unsigned int agent_id) 67 { 68 assert(agent_id < ARRAY_SIZE(scmi_channel)); 69 70 return &scmi_channel[agent_id]; 71 } 72 73 #define CLOCK_CELL(_scmi_id, _id, _name, _init_enabled) \ 74 [_scmi_id] = { \ 75 .clock_id = _id, \ 76 .name = _name, \ 77 .enabled = _init_enabled, \ 78 } 79 80 static struct stm32_scmi_clk stm32_scmi0_clock[] = { 81 CLOCK_CELL(CK_SCMI0_HSE, CK_HSE, "ck_hse", true), 82 CLOCK_CELL(CK_SCMI0_HSI, CK_HSI, "ck_hsi", true), 83 CLOCK_CELL(CK_SCMI0_CSI, CK_CSI, "ck_csi", true), 84 CLOCK_CELL(CK_SCMI0_LSE, CK_LSE, "ck_lse", true), 85 CLOCK_CELL(CK_SCMI0_LSI, CK_LSI, "ck_lsi", true), 86 CLOCK_CELL(CK_SCMI0_PLL2_Q, PLL2_Q, "pll2_q", true), 87 CLOCK_CELL(CK_SCMI0_PLL2_R, PLL2_R, "pll2_r", true), 88 CLOCK_CELL(CK_SCMI0_MPU, CK_MPU, "ck_mpu", true), 89 CLOCK_CELL(CK_SCMI0_AXI, CK_AXI, "ck_axi", true), 90 CLOCK_CELL(CK_SCMI0_BSEC, BSEC, "bsec", true), 91 CLOCK_CELL(CK_SCMI0_CRYP1, CRYP1, "cryp1", false), 92 CLOCK_CELL(CK_SCMI0_GPIOZ, GPIOZ, "gpioz", false), 93 CLOCK_CELL(CK_SCMI0_HASH1, HASH1, "hash1", false), 94 CLOCK_CELL(CK_SCMI0_I2C4, I2C4_K, "i2c4_k", false), 95 CLOCK_CELL(CK_SCMI0_I2C6, I2C6_K, "i2c6_k", false), 96 CLOCK_CELL(CK_SCMI0_IWDG1, IWDG1, "iwdg1", false), 97 CLOCK_CELL(CK_SCMI0_RNG1, RNG1_K, "rng1_k", true), 98 CLOCK_CELL(CK_SCMI0_RTC, RTC, "ck_rtc", true), 99 CLOCK_CELL(CK_SCMI0_RTCAPB, RTCAPB, "rtcapb", true), 100 CLOCK_CELL(CK_SCMI0_SPI6, SPI6_K, "spi6_k", false), 101 CLOCK_CELL(CK_SCMI0_USART1, USART1_K, "usart1_k", false), 102 }; 103 104 static struct stm32_scmi_clk stm32_scmi1_clock[] = { 105 CLOCK_CELL(CK_SCMI1_PLL3_Q, PLL3_Q, "pll3_q", true), 106 CLOCK_CELL(CK_SCMI1_PLL3_R, PLL3_R, "pll3_r", true), 107 CLOCK_CELL(CK_SCMI1_MCU, CK_MCU, "ck_mcu", false), 108 }; 109 110 #define RESET_CELL(_scmi_id, _id, _name) \ 111 [_scmi_id] = { \ 112 .reset_id = _id, \ 113 .name = _name, \ 114 } 115 116 static struct stm32_scmi_rstd stm32_scmi0_reset_domain[] = { 117 RESET_CELL(RST_SCMI0_SPI6, SPI6_R, "spi6"), 118 RESET_CELL(RST_SCMI0_I2C4, I2C4_R, "i2c4"), 119 RESET_CELL(RST_SCMI0_I2C6, I2C6_R, "i2c6"), 120 RESET_CELL(RST_SCMI0_USART1, USART1_R, "usart1"), 121 RESET_CELL(RST_SCMI0_STGEN, STGEN_R, "stgen"), 122 RESET_CELL(RST_SCMI0_GPIOZ, GPIOZ_R, "gpioz"), 123 RESET_CELL(RST_SCMI0_CRYP1, CRYP1_R, "cryp1"), 124 RESET_CELL(RST_SCMI0_HASH1, HASH1_R, "hash1"), 125 RESET_CELL(RST_SCMI0_RNG1, RNG1_R, "rng1"), 126 RESET_CELL(RST_SCMI0_MDMA, MDMA_R, "mdma"), 127 RESET_CELL(RST_SCMI0_MCU, MCU_R, "mcu"), 128 }; 129 130 struct scmi_agent_resources { 131 struct stm32_scmi_clk *clock; 132 size_t clock_count; 133 struct stm32_scmi_rstd *rstd; 134 size_t rstd_count; 135 }; 136 137 static const struct scmi_agent_resources agent_resources[] = { 138 [0] = { 139 .clock = stm32_scmi0_clock, 140 .clock_count = ARRAY_SIZE(stm32_scmi0_clock), 141 .rstd = stm32_scmi0_reset_domain, 142 .rstd_count = ARRAY_SIZE(stm32_scmi0_reset_domain), 143 }, 144 [1] = { 145 .clock = stm32_scmi1_clock, 146 .clock_count = ARRAY_SIZE(stm32_scmi1_clock), 147 }, 148 }; 149 150 static const struct scmi_agent_resources *find_resource(unsigned int agent_id) 151 { 152 assert(agent_id < ARRAY_SIZE(agent_resources)); 153 154 return &agent_resources[agent_id]; 155 } 156 157 #if ENABLE_ASSERTIONS 158 static size_t plat_scmi_protocol_count_paranoid(void) 159 { 160 unsigned int n = 0U; 161 unsigned int count = 0U; 162 163 for (n = 0U; n < ARRAY_SIZE(agent_resources); n++) { 164 if (agent_resources[n].clock_count) { 165 count++; 166 break; 167 } 168 } 169 170 for (n = 0U; n < ARRAY_SIZE(agent_resources); n++) { 171 if (agent_resources[n].rstd_count) { 172 count++; 173 break; 174 } 175 } 176 177 return count; 178 } 179 #endif 180 181 static const char vendor[] = "ST"; 182 static const char sub_vendor[] = ""; 183 184 const char *plat_scmi_vendor_name(void) 185 { 186 return vendor; 187 } 188 189 const char *plat_scmi_sub_vendor_name(void) 190 { 191 return sub_vendor; 192 } 193 194 /* Currently supporting Clocks and Reset Domains */ 195 static const uint8_t plat_protocol_list[] = { 196 SCMI_PROTOCOL_ID_CLOCK, 197 SCMI_PROTOCOL_ID_RESET_DOMAIN, 198 0U /* Null termination */ 199 }; 200 201 size_t plat_scmi_protocol_count(void) 202 { 203 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1U; 204 205 assert(count == plat_scmi_protocol_count_paranoid()); 206 207 return count; 208 } 209 210 const uint8_t *plat_scmi_protocol_list(unsigned int agent_id __unused) 211 { 212 assert(plat_scmi_protocol_count_paranoid() == 213 (ARRAY_SIZE(plat_protocol_list) - 1U)); 214 215 return plat_protocol_list; 216 } 217 218 /* 219 * Platform SCMI clocks 220 */ 221 static struct stm32_scmi_clk *find_clock(unsigned int agent_id, 222 unsigned int scmi_id) 223 { 224 const struct scmi_agent_resources *resource = find_resource(agent_id); 225 size_t n = 0U; 226 227 if (resource != NULL) { 228 for (n = 0U; n < resource->clock_count; n++) { 229 if (n == scmi_id) { 230 return &resource->clock[n]; 231 } 232 } 233 } 234 235 return NULL; 236 } 237 238 size_t plat_scmi_clock_count(unsigned int agent_id) 239 { 240 const struct scmi_agent_resources *resource = find_resource(agent_id); 241 242 if (resource == NULL) { 243 return 0U; 244 } 245 246 return resource->clock_count; 247 } 248 249 const char *plat_scmi_clock_get_name(unsigned int agent_id, 250 unsigned int scmi_id) 251 { 252 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 253 254 if ((clock == NULL) || 255 !stm32mp_nsec_can_access_clock(clock->clock_id)) { 256 return NULL; 257 } 258 259 return clock->name; 260 } 261 262 int32_t plat_scmi_clock_rates_array(unsigned int agent_id, unsigned int scmi_id, 263 unsigned long *array, size_t *nb_elts) 264 { 265 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 266 267 if (clock == NULL) { 268 return SCMI_NOT_FOUND; 269 } 270 271 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) { 272 return SCMI_DENIED; 273 } 274 275 if (array == NULL) { 276 *nb_elts = 1U; 277 } else if (*nb_elts == 1U) { 278 *array = clk_get_rate(clock->clock_id); 279 } else { 280 return SCMI_GENERIC_ERROR; 281 } 282 283 return SCMI_SUCCESS; 284 } 285 286 unsigned long plat_scmi_clock_get_rate(unsigned int agent_id, 287 unsigned int scmi_id) 288 { 289 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 290 291 if ((clock == NULL) || 292 !stm32mp_nsec_can_access_clock(clock->clock_id)) { 293 return 0U; 294 } 295 296 return clk_get_rate(clock->clock_id); 297 } 298 299 int32_t plat_scmi_clock_get_state(unsigned int agent_id, unsigned int scmi_id) 300 { 301 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 302 303 if ((clock == NULL) || 304 !stm32mp_nsec_can_access_clock(clock->clock_id)) { 305 return 0U; 306 } 307 308 return (int32_t)clock->enabled; 309 } 310 311 int32_t plat_scmi_clock_set_state(unsigned int agent_id, unsigned int scmi_id, 312 bool enable_not_disable) 313 { 314 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 315 316 if (clock == NULL) { 317 return SCMI_NOT_FOUND; 318 } 319 320 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) { 321 return SCMI_DENIED; 322 } 323 324 if (enable_not_disable) { 325 if (!clock->enabled) { 326 VERBOSE("SCMI clock %u enable\n", scmi_id); 327 clk_enable(clock->clock_id); 328 clock->enabled = true; 329 } 330 } else { 331 if (clock->enabled) { 332 VERBOSE("SCMI clock %u disable\n", scmi_id); 333 clk_disable(clock->clock_id); 334 clock->enabled = false; 335 } 336 } 337 338 return SCMI_SUCCESS; 339 } 340 341 /* 342 * Platform SCMI reset domains 343 */ 344 static struct stm32_scmi_rstd *find_rstd(unsigned int agent_id, 345 unsigned int scmi_id) 346 { 347 const struct scmi_agent_resources *resource = find_resource(agent_id); 348 size_t n; 349 350 if (resource != NULL) { 351 for (n = 0U; n < resource->rstd_count; n++) { 352 if (n == scmi_id) { 353 return &resource->rstd[n]; 354 } 355 } 356 } 357 358 return NULL; 359 } 360 361 const char *plat_scmi_rstd_get_name(unsigned int agent_id, unsigned int scmi_id) 362 { 363 const struct stm32_scmi_rstd *rstd = find_rstd(agent_id, scmi_id); 364 365 if (rstd == NULL) { 366 return NULL; 367 } 368 369 return rstd->name; 370 } 371 372 size_t plat_scmi_rstd_count(unsigned int agent_id) 373 { 374 const struct scmi_agent_resources *resource = find_resource(agent_id); 375 376 if (resource == NULL) { 377 return 0U; 378 } 379 380 return resource->rstd_count; 381 } 382 383 int32_t plat_scmi_rstd_autonomous(unsigned int agent_id, unsigned int scmi_id, 384 uint32_t state) 385 { 386 const struct stm32_scmi_rstd *rstd = find_rstd(agent_id, scmi_id); 387 388 if (rstd == NULL) { 389 return SCMI_NOT_FOUND; 390 } 391 392 if (!stm32mp_nsec_can_access_reset(rstd->reset_id)) { 393 return SCMI_DENIED; 394 } 395 396 /* Supports only reset with context loss */ 397 if (state != 0U) { 398 return SCMI_NOT_SUPPORTED; 399 } 400 401 VERBOSE("SCMI reset %lu cycle\n", rstd->reset_id); 402 403 if (stm32mp_reset_assert(rstd->reset_id, TIMEOUT_US_1MS)) { 404 return SCMI_HARDWARE_ERROR; 405 } 406 407 if (stm32mp_reset_deassert(rstd->reset_id, TIMEOUT_US_1MS)) { 408 return SCMI_HARDWARE_ERROR; 409 } 410 411 return SCMI_SUCCESS; 412 } 413 414 int32_t plat_scmi_rstd_set_state(unsigned int agent_id, unsigned int scmi_id, 415 bool assert_not_deassert) 416 { 417 const struct stm32_scmi_rstd *rstd = find_rstd(agent_id, scmi_id); 418 419 if (rstd == NULL) { 420 return SCMI_NOT_FOUND; 421 } 422 423 if (!stm32mp_nsec_can_access_reset(rstd->reset_id)) { 424 return SCMI_DENIED; 425 } 426 427 if (assert_not_deassert) { 428 VERBOSE("SCMI reset %lu set\n", rstd->reset_id); 429 stm32mp_reset_set(rstd->reset_id); 430 } else { 431 VERBOSE("SCMI reset %lu release\n", rstd->reset_id); 432 stm32mp_reset_release(rstd->reset_id); 433 } 434 435 return SCMI_SUCCESS; 436 } 437 438 /* 439 * Initialize platform SCMI resources 440 */ 441 void stm32mp1_init_scmi_server(void) 442 { 443 size_t i; 444 445 for (i = 0U; i < ARRAY_SIZE(scmi_channel); i++) { 446 scmi_smt_init_agent_channel(&scmi_channel[i]); 447 } 448 449 for (i = 0U; i < ARRAY_SIZE(agent_resources); i++) { 450 const struct scmi_agent_resources *res = &agent_resources[i]; 451 size_t j; 452 453 for (j = 0U; j < res->clock_count; j++) { 454 struct stm32_scmi_clk *clk = &res->clock[j]; 455 456 if ((clk->name == NULL) || 457 (strlen(clk->name) >= SCMI_CLOCK_NAME_SIZE)) { 458 ERROR("Invalid SCMI clock name\n"); 459 panic(); 460 } 461 462 /* Sync SCMI clocks with their targeted initial state */ 463 if (clk->enabled && 464 stm32mp_nsec_can_access_clock(clk->clock_id)) { 465 clk_enable(clk->clock_id); 466 } 467 } 468 469 for (j = 0U; j < res->rstd_count; j++) { 470 struct stm32_scmi_rstd *rstd = &res->rstd[j]; 471 472 if ((rstd->name == NULL) || 473 (strlen(rstd->name) >= SCMI_RSTD_NAME_SIZE)) { 474 ERROR("Invalid SCMI reset domain name\n"); 475 panic(); 476 } 477 } 478 } 479 } 480