xref: /rk3399_ARM-atf/plat/st/stm32mp1/stm32mp1.ld.S (revision 6dc5979a6cb2121e4c16e7bd62e24030e0f42755) 
1/*
2 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef STM32MP1_LD_S
8#define STM32MP1_LD_S
9
10#include <lib/xlat_tables/xlat_tables_defs.h>
11#include <platform_def.h>
12
13OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
14OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
15
16ENTRY(__BL2_IMAGE_START__)
17
18MEMORY {
19	HEADER (rw) : ORIGIN = 0x00000000, LENGTH = STM32MP_HEADER_RESERVED_SIZE
20	RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
21}
22
23SECTIONS
24{
25    /*
26     * TF mapping must conform to ROM code specification.
27     */
28    .header : {
29        __HEADER_START__ = .;
30        KEEP(*(.header))
31        . = ALIGN(4);
32        __HEADER_END__ = .;
33    } >HEADER
34
35    . = STM32MP_BINARY_BASE;
36    .data . : {
37        . = ALIGN(PAGE_SIZE);
38        __DATA_START__ = .;
39        *(.data*)
40
41        /*
42         * dtb.
43         * The strongest and only alignment contraint is MMU 4K page.
44         * Indeed as images below will be removed, 4K pages will be re-used.
45         */
46#if STM32MP_USE_STM32IMAGE
47        . = ( STM32MP_DTB_BASE - STM32MP_BINARY_BASE );
48#else
49        . = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
50#endif /* STM32MP_USE_STM32IMAGE */
51        __DTB_IMAGE_START__ = .;
52        *(.dtb_image*)
53        __DTB_IMAGE_END__ = .;
54
55        /*
56         * bl2.
57         * The strongest and only alignment contraint is MMU 4K page.
58         * Indeed as images below will be removed, 4K pages will be re-used.
59         */
60#if SEPARATE_CODE_AND_RODATA
61        . = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
62#else
63        . = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
64#endif
65        __BL2_IMAGE_START__ = .;
66        *(.bl2_image*)
67        __BL2_IMAGE_END__ = .;
68
69#if STM32MP_USE_STM32IMAGE && !defined(AARCH32_SP_OPTEE)
70        /*
71         * bl32 will be settled by bl2.
72         * The strongest and only alignment constraint is 8 words to simplify
73         * memraise8 assembly code.
74         */
75        . = ( STM32MP_BL32_BASE - STM32MP_BINARY_BASE );
76        __BL32_IMAGE_START__ = .;
77        *(.bl32_image*)
78        __BL32_IMAGE_END__ = .;
79#endif /* STM32MP_USE_STM32IMAGE && !defined(AARCH32_SP_OPTEE) */
80
81        __DATA_END__ = .;
82    } >RAM
83
84    __TF_END__ = .;
85
86}
87#endif /* STM32MP1_LD_S */
88