1STMicroelectronics STM32MP1 2=========================== 3 4STM32MP1 is a microprocessor designed by STMicroelectronics 5based on Arm Cortex-A7. 6It is an Armv7-A platform, using dedicated code from TF-A. 7More information can be found on `STM32MP1 Series`_ page. 8 9 10STM32MP1 Versions 11----------------- 12 13There are 2 variants for STM32MP1: STM32MP13 and STM32MP15 14 15STM32MP13 Versions 16~~~~~~~~~~~~~~~~~~ 17The STM32MP13 series is available in 3 different lines which are pin-to-pin compatible: 18 19- STM32MP131: Single Cortex-A7 core 20- STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1 21- STM32MP135: STM32MP133 + DCMIPP, LTDC 22 23Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 24 25- A Cortex-A7 @ 650 MHz 26- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz 27- D Cortex-A7 @ 900 MHz 28- F Secure Boot + HW Crypto + Cortex-A7 @ 900 MHz 29 30STM32MP15 Versions 31~~~~~~~~~~~~~~~~~~ 32The STM32MP15 series is available in 3 different lines which are pin-to-pin compatible: 33 34- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD 35- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD 36- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz 37 38Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 39 40- A Basic + Cortex-A7 @ 650 MHz 41- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz 42- D Basic + Cortex-A7 @ 800 MHz 43- F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz 44 45The `STM32MP1 part number codification`_ page gives more information about part numbers. 46 47Design 48------ 49The STM32MP1 resets in the ROM code of the Cortex-A7. 50The primary boot core (core 0) executes the boot sequence while 51secondary boot core (core 1) is kept in a holding pen loop. 52The ROM code boot sequence loads the TF-A binary image from boot device 53to embedded SRAM. 54 55The TF-A image must be properly formatted with a STM32 header structure 56for ROM code is able to load this image. 57Tool stm32image can be used to prepend this header to the generated TF-A binary. 58 59Boot with FIP 60~~~~~~~~~~~~~ 61The use of FIP is now the recommended way to boot STM32MP1 platform. 62Only BL2 (with STM32 header) is loaded by ROM code. The other binaries are 63inside the FIP binary: BL32 (SP_min or OP-TEE), U-Boot and their respective 64device tree blobs. 65 66STM32IMAGE bootchain 67~~~~~~~~~~~~~~~~~~~~ 68Although still supported, this way of booting is not recommended. 69Pease use FIP instead. 70At compilation step, BL2, BL32 and DTB file are linked together in a single 71binary. The stm32image tool is also generated and the header is added to TF-A 72binary. This binary file with header is named tf-a-stm32mp157c-ev1.stm32. 73It can then be copied in the first partition of the boot device. 74 75 76Memory mapping 77~~~~~~~~~~~~~~ 78 79:: 80 81 0x00000000 +-----------------+ 82 | | ROM 83 0x00020000 +-----------------+ 84 | | 85 | ... | 86 | | 87 0x2FFC0000 +-----------------+ \ 88 | BL32 DTB | | 89 0x2FFC5000 +-----------------+ | 90 | BL32 | | 91 0x2FFDF000 +-----------------+ | 92 | ... | | 93 0x2FFE3000 +-----------------+ | 94 | BL2 DTB | | Embedded SRAM 95 0x2FFEA000 +-----------------+ | 96 | BL2 | | 97 0x2FFFF000 +-----------------+ | 98 | SCMI mailbox | | 99 0x30000000 +-----------------+ / 100 | | 101 | ... | 102 | | 103 0x40000000 +-----------------+ 104 | | 105 | | Devices 106 | | 107 0xC0000000 +-----------------+ \ 108 | | | 109 0xC0100000 +-----------------+ | 110 | BL33 | | Non-secure RAM (DDR) 111 | ... | | 112 | | | 113 0xFFFFFFFF +-----------------+ / 114 115 116Boot sequence 117~~~~~~~~~~~~~ 118 119ROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot) 120 121or if Op-TEE is used: 122 123ROM code -> BL2 (compiled with BL2_AT_EL3) -> OP-TEE -> BL33 (U-Boot) 124 125 126Build Instructions 127------------------ 128Boot media(s) supported by BL2 must be specified in the build command. 129Available storage medias are: 130 131- ``STM32MP_SDMMC`` 132- ``STM32MP_EMMC`` 133- ``STM32MP_RAW_NAND`` 134- ``STM32MP_SPI_NAND`` 135- ``STM32MP_SPI_NOR`` 136 137Serial boot devices: 138 139- ``STM32MP_UART_PROGRAMMER`` 140- ``STM32MP_USB_PROGRAMMER`` 141 142 143Other configuration flags: 144 145- | ``DTB_FILE_NAME``: to precise board device-tree blob to be used. 146 | Default: stm32mp157c-ev1.dtb 147- | ``DWL_BUFFER_BASE``: the 'serial boot' load address of FIP, 148 | default location (end of the first 128MB) is used when absent 149- | ``STM32MP_EARLY_CONSOLE``: to enable early traces before clock driver is setup. 150 | Default: 0 (disabled) 151- | ``STM32MP_RECONFIGURE_CONSOLE``: to re-configure crash console (especially after BL2). 152 | Default: 0 (disabled) 153- | ``STM32MP_UART_BAUDRATE``: to select UART baud rate. 154 | Default: 115200 155- | ``STM32_TF_VERSION``: to manage BL2 monotonic counter. 156 | Default: 0 157- | ``STM32MP13``: to select STM32MP13 variant configuration. 158 | Default: 0 159- | ``STM32MP15``: to select STM32MP15 variant configuration. 160 | Default: 1 161 162 163Boot with FIP 164~~~~~~~~~~~~~ 165You need to build BL2, BL32 (SP_min or OP-TEE) and BL33 (U-Boot) before building FIP binary. 166 167U-Boot 168______ 169 170.. code:: bash 171 172 cd <u-boot_directory> 173 make stm32mp15_trusted_defconfig 174 make DEVICE_TREE=stm32mp157c-ev1 all 175 176OP-TEE (optional) 177_________________ 178 179.. code:: bash 180 181 cd <optee_directory> 182 make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \ 183 CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts 184 185 186TF-A BL32 (SP_min) 187__________________ 188If you choose not to use OP-TEE, you can use TF-A SP_min. 189To build TF-A BL32, and its device tree file: 190 191.. code:: bash 192 193 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 194 AARCH32_SP=sp_min DTB_FILE_NAME=stm32mp157c-ev1.dtb bl32 dtbs 195 196TF-A BL2 197________ 198To build TF-A BL2 with its STM32 header for SD-card boot: 199 200.. code:: bash 201 202 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 203 DTB_FILE_NAME=stm32mp157c-ev1.dtb STM32MP_SDMMC=1 204 205For other boot devices, you have to replace STM32MP_SDMMC in the previous command 206with the desired device flag. 207 208This BL2 is independent of the BL32 used (SP_min or OP-TEE) 209 210 211FIP 212___ 213With BL32 SP_min: 214 215.. code:: bash 216 217 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 218 AARCH32_SP=sp_min \ 219 DTB_FILE_NAME=stm32mp157c-ev1.dtb \ 220 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 221 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 222 fip 223 224With OP-TEE: 225 226.. code:: bash 227 228 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 229 AARCH32_SP=optee \ 230 DTB_FILE_NAME=stm32mp157c-ev1.dtb \ 231 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 232 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 233 BL32=<optee_directory>/tee-header_v2.bin \ 234 BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin 235 BL32_EXTRA2=<optee_directory>/tee-pageable_v2.bin 236 fip 237 238 239STM32IMAGE bootchain 240~~~~~~~~~~~~~~~~~~~~ 241You need to add the following flag to the make command: 242``STM32MP_USE_STM32IMAGE=1`` 243 244To build with SP_min and support for SD-card boot: 245 246.. code:: bash 247 248 make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 249 AARCH32_SP=sp_min STM32MP_SDMMC=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb \ 250 STM32MP_USE_STM32IMAGE=1 251 252 cd <u-boot_directory> 253 make stm32mp15_trusted_defconfig 254 make DEVICE_TREE=stm32mp157c-ev1 all 255 256To build TF-A with OP-TEE support for SD-card boot: 257 258.. code:: bash 259 260 make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 261 AARCH32_SP=optee STM32MP_SDMMC=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb \ 262 STM32MP_USE_STM32IMAGE=1 263 264 cd <optee_directory> 265 make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \ 266 CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts 267 268 cd <u-boot_directory> 269 make stm32mp15_trusted_defconfig 270 make DEVICE_TREE=stm32mp157c-ev1 all 271 272 273The following build options are supported: 274 275- ``ENABLE_STACK_PROTECTOR``: To enable the stack protection. 276 277 278Populate SD-card 279---------------- 280 281Boot with FIP 282~~~~~~~~~~~~~ 283The SD-card has to be formatted with GPT. 284It should contain at least those partitions: 285 286- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary (BL2) 287- fip: which contains the FIP binary 288 289Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl. 290 291STM32IMAGE bootchain 292~~~~~~~~~~~~~~~~~~~~ 293The SD-card has to be formatted with GPT. 294It should contain at least those partitions: 295 296- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary 297- ssbl: to copy the u-boot.stm32 binary 298 299Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl. 300 301OP-TEE artifacts go into separate partitions as follows: 302 303- teeh: tee-header_v2.stm32 304- teed: tee-pageable_v2.stm32 305- teex: tee-pager_v2.stm32 306 307 308.. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html 309.. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification 310