| cdf002de | 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): add dynamic mapping
Dynamically add an MMU entry for the uSDHC controller.
Change-Id: Ifd21fcee79392a1432aa7444aec168105a95a002 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciu
feat(nxp-mmc): add dynamic mapping
Dynamically add an MMU entry for the uSDHC controller.
Change-Id: Ifd21fcee79392a1432aa7444aec168105a95a002 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| 583a544c | 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): wait SDSTB before changing the clock
According to the reference manual, the host driver must ensure that the SDSTB field is high before changing the clock divisor value (SDCLKFS or DVS
fix(nxp-mmc): wait SDSTB before changing the clock
According to the reference manual, the host driver must ensure that the SDSTB field is high before changing the clock divisor value (SDCLKFS or DVS).
Change-Id: I3c89df707a825ccb5e5125b52e2d321b659bbb3f Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| 2e90f3e6 | 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): fix the clock rate calculation
Based on the reference manual's description of SYS_CTRL.SDCLKFS and SYS_CTRL.DVS, the clock rate can be adjusted using a two-stage divider. The value of
fix(nxp-mmc): fix the clock rate calculation
Based on the reference manual's description of SYS_CTRL.SDCLKFS and SYS_CTRL.DVS, the clock rate can be adjusted using a two-stage divider. The value of SYS_CTRL.DVS should be set considering the value of SYS_CTRL.SDCLKFS (pre_div). Consequently, the resulting clock rate is calculated as input_rate / (SYS_CTRL.SDCLKFS * SYS_CTRL.DVS).
Change-Id: I65a5372b8baf9def97e612ee29f99202c0fdc579 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| 6347429e | 27-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): remove unnecessary delay
There are no references in the reference manual indicating a required delay after resetting INTSIGEN. Therefore, it is safe to remove this step.
Change-Id: Ia
fix(nxp-mmc): remove unnecessary delay
There are no references in the reference manual indicating a required delay after resetting INTSIGEN. Therefore, it is safe to remove this step.
Change-Id: Ia748cfeb8f4a0f619480ef59451df90f85f69fa8 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| 7e2a4347 | 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): flush and invalidate buffers
When the uSDHC driver is used with enabled caches on the core setting the transfer, the caches associated with the memory region used for data transfer mu
feat(nxp-mmc): flush and invalidate buffers
When the uSDHC driver is used with enabled caches on the core setting the transfer, the caches associated with the memory region used for data transfer must be invalidated before reading from the buffer and flushed before the buffer is passed to the controller.
Change-Id: I8213f120b655146772306ef57ee8204596fb05e9 Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| b61379fb | 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): add data buffer
The prepare callback is used to set buffer details for a transfer. The actual transfer may not occur immediately. Therefore, the details are saved and applied to the n
feat(nxp-mmc): add data buffer
The prepare callback is used to set buffer details for a transfer. The actual transfer may not occur immediately. Therefore, the details are saved and applied to the next data transfer command. This mechanism also helps distinguish between single and multi-block transfers based on the transfer size.
Change-Id: I7bcfde0521ad628e5950dfc71482191ac35433d1 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| f9ed855b | 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): check multi block transfer
Extract the multiblock check into a dedicated function. This function returns true for multiblock reads and writes.
Change-Id: I6c4ea62977781a4f43d6a20
refactor(nxp-mmc): check multi block transfer
Extract the multiblock check into a dedicated function. This function returns true for multiblock reads and writes.
Change-Id: I6c4ea62977781a4f43d6a20513147b99b3baa1b2 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| 13a839a7 | 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): set MIXCTRL_DTDSEL
According to the reference manual, the MIX_CTRL.DTDSEL should be set for commands involving a transfer from the card to the host. Therefore, it should be disabl
refactor(nxp-mmc): set MIXCTRL_DTDSEL
According to the reference manual, the MIX_CTRL.DTDSEL should be set for commands involving a transfer from the card to the host. Therefore, it should be disabled for write commands, specifically for single and multi-block writes.
Change-Id: I97a08291c6ee134e1d5c7e072a06e1b060d5da14 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| a59d43fc | 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): populate command transfer type
The CMD_XFR_TYP register description in the reference manual includes a table where the response type, index check, and CRC check are populated base
refactor(nxp-mmc): populate command transfer type
The CMD_XFR_TYP register description in the reference manual includes a table where the response type, index check, and CRC check are populated based on the CMD's response type. Therefore, replace the CMD_XFR_TYP set based on the command ID with the mechanism mentioned in the reference manual.
Change-Id: Ibe6e04d1682e258ae2377dd7a1d0abb6c7b3f164 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| 3d165079 | 04-Apr-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): fix clk_rate and bus_width type
Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params' are defined as integers, while their usages are unsigned int. Therefore, change t
fix(nxp-mmc): fix clk_rate and bus_width type
Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params' are defined as integers, while their usages are unsigned int. Therefore, change the type to unsigned int. This also helps to avoid MISRA C-2012 Rule 10.3 violations when unsigned values are assigned to signed variables.
Change-Id: If52e15a164732b68286f5303c4acbeb4ff993081 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| e67606cf | 04-Jul-2018 |
Jun Nie <jun.nie@linaro.org> |
drivers: imx: imx_gpt: Add general purpose timer API binding
Add delay timer API so that it can be called by delay timer layer and used as delay timer globally.
[bod: changed name from imx_delay_ti
drivers: imx: imx_gpt: Add general purpose timer API binding
Add delay timer API so that it can be called by delay timer layer and used as delay timer globally.
[bod: changed name from imx_delay_timer -> imx_gpt ]
Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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| 2f5307d6 | 25-May-2018 |
Bryan O'Donoghue <bryan.odonoghue@linaro.org> |
drivers: imx: crash-console: Add a mxc_crash_console driver
This patch does two main things
- It implements the crash console UART init in assembly, as a hard-coded 115200 8N1 assumed from the 24
drivers: imx: crash-console: Add a mxc_crash_console driver
This patch does two main things
- It implements the crash console UART init in assembly, as a hard-coded 115200 8N1 assumed from the 24 MHz clock.
If the clock setup code has not run yet, this code can't work but, setting up clocks and clock-gates is way out of scope for this type of recovery function.
- It adds code to write a character out of the NXP UART without using any stack-based operations when doing so.
- Provides support for crash console in DCE or DTE mode.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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