1 /* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <delay_timer.h> 9 #include <mmio.h> 10 #include <imx_gpt.h> 11 12 #define GPTCR_SWR BIT(15) /* Software reset */ 13 #define GPTCR_24MEN BIT(10) /* Enable 24MHz clock input */ 14 #define GPTCR_CLKSOURCE_OSC (5 << 6) /* Clock source OSC */ 15 #define GPTCR_CLKSOURCE_MASK (0x7 << 6) 16 #define GPTCR_TEN 1 /* Timer enable */ 17 18 #define GPTPR_PRESCL_24M_SHIFT 12 19 20 #define SYS_COUNTER_FREQ_IN_MHZ 3 21 22 #define GPTPR_TIMER_CTRL (imx_base_addr + 0x000) 23 #define GPTPR_TIMER_PRESCL (imx_base_addr + 0x004) 24 #define GPTPR_TIMER_CNTR (imx_base_addr + 0x024) 25 26 static uintptr_t imx_base_addr; 27 28 uint32_t imx_get_timer_value(void) 29 { 30 return ~mmio_read_32(GPTPR_TIMER_CNTR); 31 } 32 33 static const timer_ops_t imx_gpt_ops = { 34 .get_timer_value = imx_get_timer_value, 35 .clk_mult = 1, 36 .clk_div = SYS_COUNTER_FREQ_IN_MHZ, 37 }; 38 39 void imx_gpt_ops_init(uintptr_t base_addr) 40 { 41 int val; 42 43 assert(base_addr != 0); 44 45 imx_base_addr = base_addr; 46 47 /* setup GP Timer */ 48 mmio_write_32(GPTPR_TIMER_CTRL, GPTCR_SWR); 49 mmio_write_32(GPTPR_TIMER_CTRL, 0); 50 51 /* get 3MHz from 24MHz */ 52 mmio_write_32(GPTPR_TIMER_PRESCL, (7 << GPTPR_PRESCL_24M_SHIFT)); 53 54 val = mmio_read_32(GPTPR_TIMER_CTRL); 55 val &= ~GPTCR_CLKSOURCE_MASK; 56 val |= GPTCR_24MEN | GPTCR_CLKSOURCE_OSC | GPTCR_TEN; 57 mmio_write_32(GPTPR_TIMER_CTRL, val); 58 59 timer_init(&imx_gpt_ops); 60 } 61