1 /* 2 * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #ifndef __IMX_CONSOLE_H__ 7 #define __IMX_CONSOLE_H__ 8 9 #define IMX_UART_RXD_OFFSET 0x00 10 #define IMX_UART_RXD_CHARRDY BIT(15) 11 #define IMX_UART_RXD_ERR BIT(14) 12 #define IMX_UART_RXD_OVERRUN BIT(13) 13 #define IMX_UART_RXD_FRMERR BIT(12) 14 #define IMX_UART_RXD_BRK BIT(11) 15 #define IMX_UART_RXD_PRERR BIT(10) 16 17 #define IMX_UART_TXD_OFFSET 0x40 18 19 #define IMX_UART_CR1_OFFSET 0x80 20 #define IMX_UART_CR1_ADEN BIT(15) 21 #define IMX_UART_CR1_ADBR BIT(14) 22 #define IMX_UART_CR1_TRDYEN BIT(13) 23 #define IMX_UART_CR1_IDEN BIT(12) 24 #define IMX_UART_CR1_RRDYEN BIT(9) 25 #define IMX_UART_CR1_RXDMAEN BIT(8) 26 #define IMX_UART_CR1_IREN BIT(7) 27 #define IMX_UART_CR1_TXMPTYEN BIT(6) 28 #define IMX_UART_CR1_RTSDEN BIT(5) 29 #define IMX_UART_CR1_SNDBRK BIT(4) 30 #define IMX_UART_CR1_TXDMAEN BIT(3) 31 #define IMX_UART_CR1_ATDMAEN BIT(2) 32 #define IMX_UART_CR1_DOZE BIT(1) 33 #define IMX_UART_CR1_UARTEN BIT(0) 34 35 #define IMX_UART_CR2_OFFSET 0x84 36 #define IMX_UART_CR2_ESCI BIT(15) 37 #define IMX_UART_CR2_IRTS BIT(14) 38 #define IMX_UART_CR2_CTSC BIT(13) 39 #define IMX_UART_CR2_CTS BIT(12) 40 #define IMX_UART_CR2_ESCEN BIT(11) 41 #define IMX_UART_CR2_PREN BIT(8) 42 #define IMX_UART_CR2_PROE BIT(7) 43 #define IMX_UART_CR2_STPB BIT(6) 44 #define IMX_UART_CR2_WS BIT(5) 45 #define IMX_UART_CR2_RTSEN BIT(4) 46 #define IMX_UART_CR2_ATEN BIT(3) 47 #define IMX_UART_CR2_TXEN BIT(2) 48 #define IMX_UART_CR2_RXEN BIT(1) 49 #define IMX_UART_CR2_SRST BIT(0) 50 51 #define IMX_UART_CR3_OFFSET 0x88 52 #define IMX_UART_CR3_DTREN BIT(13) 53 #define IMX_UART_CR3_PARERREN BIT(12) 54 #define IMX_UART_CR3_FARERREN BIT(11) 55 #define IMX_UART_CR3_DSD BIT(10) 56 #define IMX_UART_CR3_DCD BIT(9) 57 #define IMX_UART_CR3_RI BIT(8) 58 #define IMX_UART_CR3_ADNIMP BIT(7) 59 #define IMX_UART_CR3_RXDSEN BIT(6) 60 #define IMX_UART_CR3_AIRINTEN BIT(5) 61 #define IMX_UART_CR3_AWAKEN BIT(4) 62 #define IMX_UART_CR3_DTRDEN BIT(3) 63 #define IMX_UART_CR3_RXDMUXSEL BIT(2) 64 #define IMX_UART_CR3_INVT BIT(1) 65 #define IMX_UART_CR3_ACIEN BIT(0) 66 67 #define IMX_UART_CR4_OFFSET 0x8c 68 #define IMX_UART_CR4_INVR BIT(9) 69 #define IMX_UART_CR4_ENIRI BIT(8) 70 #define IMX_UART_CR4_WKEN BIT(7) 71 #define IMX_UART_CR4_IDDMAEN BIT(6) 72 #define IMX_UART_CR4_IRSC BIT(5) 73 #define IMX_UART_CR4_LPBYP BIT(4) 74 #define IMX_UART_CR4_TCEN BIT(3) 75 #define IMX_UART_CR4_BKEN BIT(2) 76 #define IMX_UART_CR4_OREN BIT(1) 77 #define IMX_UART_CR4_DREN BIT(0) 78 79 #define IMX_UART_FCR_OFFSET 0x90 80 #define IMX_UART_FCR_TXTL_MASK (BIT(15) | BIT(14) | BIT(13) | BIT(12) |\ 81 BIT(11) | BIT(10)) 82 #define IMX_UART_FCR_TXTL(x) ((x) << 10) 83 #define IMX_UART_FCR_RFDIV_MASK (BIT(9) | BIT(8) | BIT(7)) 84 #define IMX_UART_FCR_RFDIV7 (BIT(9) | BIT(8)) 85 #define IMX_UART_FCR_RFDIV1 (BIT(9) | BIT(7)) 86 #define IMX_UART_FCR_RFDIV2 BIT(9) 87 #define IMX_UART_FCR_RFDIV3 (BIT(8) | BIT(7)) 88 #define IMX_UART_FCR_RFDIV4 BIT(8) 89 #define IMX_UART_FCR_RFDIV5 BIT(7) 90 #define IMX_UART_FCR_RFDIV6 0 91 #define IMX_UART_FCR_DCEDTE BIT(6) 92 #define IMX_UART_FCR_RXTL_MASK (BIT(5) | BIT(4) | BIT(3) | BIT(2) |\ 93 BIT(1) | BIT(0)) 94 #define IMX_UART_FCR_RXTL(x) x 95 96 #define IMX_UART_STAT1_OFFSET 0x94 97 #define IMX_UART_STAT1_PARITYERR BIT(15) 98 #define IMX_UART_STAT1_RTSS BIT(14) 99 #define IMX_UART_STAT1_TRDY BIT(13) 100 #define IMX_UART_STAT1_RTSD BIT(12) 101 #define IMX_UART_STAT1_ESCF BIT(11) 102 #define IMX_UART_STAT1_FRAMEERR BIT(10) 103 #define IMX_UART_STAT1_RRDY BIT(9) 104 #define IMX_UART_STAT1_AGTIM BIT(8) 105 #define IMX_UART_STAT1_DTRD BIT(7) 106 #define IMX_UART_STAT1_RXDS BIT(6) 107 #define IMX_UART_STAT1_AIRINT BIT(5) 108 #define IMX_UART_STAT1_AWAKE BIT(4) 109 #define IMX_UART_STAT1_SAD BIT(3) 110 111 #define IMX_UART_STAT2_OFFSET 0x98 112 #define IMX_UART_STAT2_ADET BIT(15) 113 #define IMX_UART_STAT2_TXFE BIT(14) 114 #define IMX_UART_STAT2_DTRF BIT(13) 115 #define IMX_UART_STAT2_IDLE BIT(12) 116 #define IMX_UART_STAT2_ACST BIT(11) 117 #define IMX_UART_STAT2_RIDELT BIT(10) 118 #define IMX_UART_STAT2_RIIN BIT(9) 119 #define IMX_UART_STAT2_IRINT BIT(8) 120 #define IMX_UART_STAT2_WAKE BIT(7) 121 #define IMX_UART_STAT2_DCDDELT BIT(6) 122 #define IMX_UART_STAT2_DCDIN BIT(5) 123 #define IMX_UART_STAT2_RTSF BIT(4) 124 #define IMX_UART_STAT2_TXDC BIT(3) 125 #define IMX_UART_STAT2_BRCD BIT(2) 126 #define IMX_UART_STAT2_ORE BIT(1) 127 #define IMX_UART_STAT2_RCR BIT(0) 128 129 #define IMX_UART_ESC_OFFSET 0x9c 130 131 #define IMX_UART_TIM_OFFSET 0xa0 132 133 #define IMX_UART_BIR_OFFSET 0xa4 134 135 #define IMX_UART_BMR_OFFSET 0xa8 136 137 #define IMX_UART_BRC_OFFSET 0xac 138 139 #define IMX_UART_ONEMS_OFFSET 0xb0 140 141 #define IMX_UART_TS_OFFSET 0xb4 142 #define IMX_UART_TS_FRCPERR BIT(13) 143 #define IMX_UART_TS_LOOP BIT(12) 144 #define IMX_UART_TS_DBGEN BIT(11) 145 #define IMX_UART_TS_LOOPIR BIT(10) 146 #define IMX_UART_TS_RXDBG BIT(9) 147 #define IMX_UART_TS_TXEMPTY BIT(6) 148 #define IMX_UART_TS_RXEMPTY BIT(5) 149 #define IMX_UART_TS_TXFULL BIT(4) 150 #define IMX_UART_TS_RXFULL BIT(3) 151 #define IMX_UART_TS_SOFTRST BIT(0) 152 153 #endif /* __IMX_UART_H__ */ 154