1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Default cluster count for FVP 11FVP_CLUSTER_COUNT := 2 12 13# Default number of CPUs per cluster on FVP 14FVP_MAX_CPUS_PER_CLUSTER := 4 15 16# Default number of threads per CPU on FVP 17FVP_MAX_PE_PER_CPU := 1 18 19FVP_DT_PREFIX := fvp-base-gicv3-psci 20 21# The FVP platform depends on this macro to build with correct GIC driver. 22$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 23 24# Pass FVP_CLUSTER_COUNT to the build system. 25$(eval $(call add_define,FVP_CLUSTER_COUNT)) 26 27# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 28$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 29 30# Pass FVP_MAX_PE_PER_CPU to the build system. 31$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 32 33# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 34# choose the CCI driver , else the CCN driver 35ifeq ($(FVP_CLUSTER_COUNT), 0) 36$(error "Incorrect cluster count specified for FVP port") 37else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 38FVP_INTERCONNECT_DRIVER := FVP_CCI 39else 40FVP_INTERCONNECT_DRIVER := FVP_CCN 41endif 42 43$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 44 45# Choose the GIC sources depending upon the how the FVP will be invoked 46ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 47 48# The GIC model (GIC-600 or GIC-500) will be detected at runtime 49GICV3_SUPPORT_GIC600 := 1 50GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 51 52# Include GICv3 driver files 53include drivers/arm/gic/v3/gicv3.mk 54 55FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 56 plat/common/plat_gicv3.c \ 57 plat/arm/common/arm_gicv3.c 58 59 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 60 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 61 endif 62 63else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 64 65# No GICv4 extension 66GIC_ENABLE_V4_EXTN := 0 67$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 68 69# Include GICv2 driver files 70include drivers/arm/gic/v2/gicv2.mk 71 72FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 73 plat/common/plat_gicv2.c \ 74 plat/arm/common/arm_gicv2.c 75 76FVP_DT_PREFIX := fvp-base-gicv2-psci 77else 78$(error "Incorrect GIC driver chosen on FVP port") 79endif 80 81ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 82FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 83else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 84FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 85 plat/arm/common/arm_ccn.c 86else 87$(error "Incorrect CCN driver chosen on FVP port") 88endif 89 90FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 91 plat/arm/board/fvp/fvp_security.c \ 92 plat/arm/common/arm_tzc400.c 93 94 95PLAT_INCLUDES := -Iplat/arm/board/fvp/include 96 97 98PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 99 100FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 101 102ifeq (${ARCH}, aarch64) 103 104# select a different set of CPU files, depending on whether we compile for 105# hardware assisted coherency cores or not 106ifeq (${HW_ASSISTED_COHERENCY}, 0) 107# Cores used without DSU 108 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 109 lib/cpus/aarch64/cortex_a53.S \ 110 lib/cpus/aarch64/cortex_a57.S \ 111 lib/cpus/aarch64/cortex_a72.S \ 112 lib/cpus/aarch64/cortex_a73.S 113else 114# Cores used with DSU only 115 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 116 # AArch64-only cores 117 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 118 lib/cpus/aarch64/cortex_a76ae.S \ 119 lib/cpus/aarch64/cortex_a77.S \ 120 lib/cpus/aarch64/cortex_a78.S \ 121 lib/cpus/aarch64/neoverse_n1.S \ 122 lib/cpus/aarch64/neoverse_e1.S \ 123 lib/cpus/aarch64/neoverse_v1.S \ 124 lib/cpus/aarch64/cortex_a78_ae.S \ 125 lib/cpus/aarch64/cortex_klein.S \ 126 lib/cpus/aarch64/cortex_matterhorn.S \ 127 lib/cpus/aarch64/cortex_a65.S \ 128 lib/cpus/aarch64/cortex_a65ae.S 129 endif 130 # AArch64/AArch32 cores 131 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 132 lib/cpus/aarch64/cortex_a75.S 133endif 134 135else 136FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 137endif 138 139BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 140 drivers/arm/sp805/sp805.c \ 141 drivers/delay_timer/delay_timer.c \ 142 drivers/io/io_semihosting.c \ 143 lib/semihosting/semihosting.c \ 144 lib/semihosting/${ARCH}/semihosting_call.S \ 145 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 146 plat/arm/board/fvp/fvp_bl1_setup.c \ 147 plat/arm/board/fvp/fvp_err.c \ 148 plat/arm/board/fvp/fvp_io_storage.c \ 149 ${FVP_CPU_LIBS} \ 150 ${FVP_INTERCONNECT_SOURCES} 151 152ifeq (${USE_SP804_TIMER},1) 153BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 154else 155BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 156endif 157 158 159BL2_SOURCES += drivers/arm/sp805/sp805.c \ 160 drivers/io/io_semihosting.c \ 161 lib/utils/mem_region.c \ 162 lib/semihosting/semihosting.c \ 163 lib/semihosting/${ARCH}/semihosting_call.S \ 164 plat/arm/board/fvp/fvp_bl2_setup.c \ 165 plat/arm/board/fvp/fvp_err.c \ 166 plat/arm/board/fvp/fvp_io_storage.c \ 167 plat/arm/common/arm_nor_psci_mem_protect.c \ 168 ${FVP_SECURITY_SOURCES} 169 170 171ifeq (${COT_DESC_IN_DTB},1) 172BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c 173endif 174 175ifeq (${BL2_AT_EL3},1) 176BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 177 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 178 ${FVP_CPU_LIBS} \ 179 ${FVP_INTERCONNECT_SOURCES} 180endif 181 182ifeq (${USE_SP804_TIMER},1) 183BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 184endif 185 186BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 187 ${FVP_SECURITY_SOURCES} 188 189ifeq (${USE_SP804_TIMER},1) 190BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 191endif 192 193BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 194 drivers/arm/smmu/smmu_v3.c \ 195 drivers/delay_timer/delay_timer.c \ 196 drivers/cfi/v2m/v2m_flash.c \ 197 lib/utils/mem_region.c \ 198 plat/arm/board/fvp/fvp_bl31_setup.c \ 199 plat/arm/board/fvp/fvp_console.c \ 200 plat/arm/board/fvp/fvp_pm.c \ 201 plat/arm/board/fvp/fvp_topology.c \ 202 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 203 plat/arm/common/arm_nor_psci_mem_protect.c \ 204 ${FVP_CPU_LIBS} \ 205 ${FVP_GIC_SOURCES} \ 206 ${FVP_INTERCONNECT_SOURCES} \ 207 ${FVP_SECURITY_SOURCES} 208 209# Support for fconf in BL31 210# Added separately from the above list for better readability 211ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 212BL31_SOURCES += common/fdt_wrappers.c \ 213 lib/fconf/fconf.c \ 214 lib/fconf/fconf_dyn_cfg_getter.c \ 215 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 216 217ifeq (${SEC_INT_DESC_IN_FCONF},1) 218BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 219endif 220 221endif 222 223ifeq (${USE_SP804_TIMER},1) 224BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 225else 226BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 227endif 228 229# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 230ifdef UNIX_MK 231FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 232FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 233 ${PLAT}_fw_config.dts \ 234 ${PLAT}_tb_fw_config.dts \ 235 ${PLAT}_soc_fw_config.dts \ 236 ${PLAT}_nt_fw_config.dts \ 237 ) 238 239FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 240FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 241FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 242FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 243 244ifeq (${SPD},tspd) 245FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 246FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 247 248# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 249$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 250endif 251 252ifeq (${SPD},spmd) 253 254ifeq ($(ARM_SPMC_MANIFEST_DTS),) 255ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 256endif 257 258FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 259FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 260 261# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 262$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 263endif 264 265# Add the FW_CONFIG to FIP and specify the same to certtool 266$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) 267# Add the TB_FW_CONFIG to FIP and specify the same to certtool 268$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG})) 269# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 270$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG})) 271# Add the NT_FW_CONFIG to FIP and specify the same to certtool 272$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 273 274FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 275$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 276 277# Add the HW_CONFIG to FIP and specify the same to certtool 278$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) 279endif 280 281# Enable Activity Monitor Unit extensions by default 282ENABLE_AMU := 1 283 284# Enable dynamic mitigation support by default 285DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 286 287# Enable reclaiming of BL31 initialisation code for secondary cores 288# stacks for FVP. However, don't enable reclaiming for clang. 289ifneq (${RESET_TO_BL31},1) 290ifeq ($(findstring clang,$(notdir $(CC))),) 291RECLAIM_INIT_CODE := 1 292endif 293endif 294 295ifeq (${ENABLE_AMU},1) 296BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 297 lib/cpus/aarch64/cpuamu_helpers.S 298 299ifeq (${HW_ASSISTED_COHERENCY}, 1) 300BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 301 lib/cpus/aarch64/neoverse_n1_pubsub.c 302endif 303endif 304 305ifeq (${RAS_EXTENSION},1) 306BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 307endif 308 309ifneq (${ENABLE_STACK_PROTECTOR},0) 310PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 311endif 312 313ifeq (${ARCH},aarch32) 314 NEED_BL32 := yes 315endif 316 317# Enable the dynamic translation tables library. 318ifeq (${ARCH},aarch32) 319 ifeq (${RESET_TO_SP_MIN},1) 320 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 321 endif 322else # AArch64 323 ifeq (${RESET_TO_BL31},1) 324 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 325 endif 326 ifeq (${SPD},trusty) 327 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 328 endif 329endif 330 331ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 332 ifeq (${ARCH},aarch32) 333 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 334 else # AArch64 335 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 336 ifeq (${SPD},tspd) 337 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 338 endif 339 endif 340endif 341 342ifeq (${USE_DEBUGFS},1) 343 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 344endif 345 346# Add support for platform supplied linker script for BL31 build 347$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 348 349ifneq (${BL2_AT_EL3}, 0) 350 override BL1_SOURCES = 351endif 352 353include plat/arm/board/common/board_common.mk 354include plat/arm/common/arm_common.mk 355 356ifeq (${TRUSTED_BOARD_BOOT}, 1) 357BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 358BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 359 360ifeq (${MEASURED_BOOT},1) 361BL2_SOURCES += plat/arm/board/fvp/fvp_measured_boot.c 362endif 363 364# FVP being a development platform, enable capability to disable Authentication 365# dynamically if TRUSTED_BOARD_BOOT is set. 366DYN_DISABLE_AUTH := 1 367endif 368