| 4200e5aa | 24-Apr-2019 |
Heiko Stuebner <heiko@sntech.de> |
rockchip: only include libfdt in non-coreboot cases
While mainline u-boot always expects to submit the devicetree as platform param, coreboot always uses the existing parameter structure. As libfdt
rockchip: only include libfdt in non-coreboot cases
While mainline u-boot always expects to submit the devicetree as platform param, coreboot always uses the existing parameter structure. As libfdt is somewhat big, it makes sense to limit its inclusion to where necessary and thus only to non-coreboot builds.
libfdt itself will get build in all cases, but only the non- coreboot build will actually reference and thus include it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
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| 5b886432 | 23-Apr-2018 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: Add watchdog support in pmusram
To catch early hangs in resume, this sets up the watchdog before anything else in the pmusram code (ignoring setting up the stack...). This uses hard
rockchip/rk3399: Add watchdog support in pmusram
To catch early hangs in resume, this sets up the watchdog before anything else in the pmusram code (ignoring setting up the stack...). This uses hard coded settings for the watchdog until the proper watchdog restore later on in the firmware/kernel.
This also restores the old watchdog register values before the PLLs are restored to make sure we don't temporarily switch over to a 1/3s timeout on the watchdog when the pclk_wdt goes from 4MHz to 100MHz.
Change-Id: I8f7652089a88783271b17482117b4609330abe80 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| ff4735cf | 20-Apr-2018 |
Lin Huang <hl@rock-chips.com> |
rockchip/rk3399: Split M0 binary into two
All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST when SOC enter into FSM, and SRAM will shutdown during this time, so this code need ru
rockchip/rk3399: Split M0 binary into two
All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST when SOC enter into FSM, and SRAM will shutdown during this time, so this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram part still run in SRAM, and suspend part run in PMUSRAM.
Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1 Signed-off-by: Lin Huang <hl@rock-chips.com>
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