xref: /rk3399_ARM-atf/drivers/mentor/i2c/mi2cv.c (revision a08a2014300a495381cdb8f6d59523bcd5d3b883)
1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
4  *
5  * SPDX-License-Identifier:     BSD-3-Clause
6  * https://spdx.org/licenses
7  */
8 
9 /*
10  * This driver is for Mentor Graphics Inventra MI2CV IP core, which is used
11  * for Marvell and Allwinner SoCs in ATF.
12  */
13 
14 #include <debug.h>
15 #include <delay_timer.h>
16 #include <errno.h>
17 #include <mentor/mi2cv.h>
18 #include <mmio.h>
19 
20 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
21 #define DEBUG_I2C
22 #endif
23 
24 #define I2C_TIMEOUT_VALUE		0x500
25 #define I2C_MAX_RETRY_CNT		1000
26 #define I2C_CMD_WRITE			0x0
27 #define I2C_CMD_READ			0x1
28 
29 #define I2C_DATA_ADDR_7BIT_OFFS		0x1
30 #define I2C_DATA_ADDR_7BIT_MASK		(0xFF << I2C_DATA_ADDR_7BIT_OFFS)
31 
32 #define I2C_CONTROL_ACK			0x00000004
33 #define I2C_CONTROL_IFLG		0x00000008
34 #define I2C_CONTROL_STOP		0x00000010
35 #define I2C_CONTROL_START		0x00000020
36 #define I2C_CONTROL_TWSIEN		0x00000040
37 #define I2C_CONTROL_INTEN		0x00000080
38 
39 #define I2C_STATUS_START			0x08
40 #define I2C_STATUS_REPEATED_START		0x10
41 #define I2C_STATUS_ADDR_W_ACK			0x18
42 #define I2C_STATUS_DATA_W_ACK			0x28
43 #define I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER	0x38
44 #define I2C_STATUS_ADDR_R_ACK			0x40
45 #define I2C_STATUS_DATA_R_ACK			0x50
46 #define I2C_STATUS_DATA_R_NAK			0x58
47 #define I2C_STATUS_LOST_ARB_GENERAL_CALL	0x78
48 #define I2C_STATUS_IDLE				0xF8
49 
50 #define I2C_UNSTUCK_TRIGGER			0x1
51 #define I2C_UNSTUCK_ONGOING			0x2
52 #define I2C_UNSTUCK_ERROR			0x4
53 
54 static struct mentor_i2c_regs *base;
55 
56 static int mentor_i2c_lost_arbitration(uint32_t *status)
57 {
58 	*status = mmio_read_32((uintptr_t)&base->status);
59 	if ((*status == I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER) ||
60 	    (*status == I2C_STATUS_LOST_ARB_GENERAL_CALL))
61 		return -EAGAIN;
62 
63 	return 0;
64 }
65 
66 static void mentor_i2c_interrupt_clear(void)
67 {
68 	uint32_t reg;
69 
70 	reg = mmio_read_32((uintptr_t)&base->control);
71 #ifndef I2C_INTERRUPT_CLEAR_INVERTED
72 	reg &= ~(I2C_CONTROL_IFLG);
73 #else
74 	reg |= I2C_CONTROL_IFLG;
75 #endif
76 	mmio_write_32((uintptr_t)&base->control, reg);
77 	/* Wait for 1 us for the clear to take effect */
78 	udelay(1);
79 }
80 
81 static int mentor_i2c_interrupt_get(void)
82 {
83 	uint32_t reg;
84 
85 	/* get the interrupt flag bit */
86 	reg = mmio_read_32((uintptr_t)&base->control);
87 	reg &= I2C_CONTROL_IFLG;
88 	return reg && I2C_CONTROL_IFLG;
89 }
90 
91 static int mentor_i2c_wait_interrupt(void)
92 {
93 	uint32_t timeout = 0;
94 
95 	while (!mentor_i2c_interrupt_get() && (timeout++ < I2C_TIMEOUT_VALUE))
96 		;
97 	if (timeout >= I2C_TIMEOUT_VALUE)
98 		return -ETIMEDOUT;
99 
100 	return 0;
101 }
102 
103 static int mentor_i2c_start_bit_set(void)
104 {
105 	int is_int_flag = 0;
106 	uint32_t status;
107 
108 	if (mentor_i2c_interrupt_get())
109 		is_int_flag = 1;
110 
111 	/* set start bit */
112 	mmio_write_32((uintptr_t)&base->control,
113 		      mmio_read_32((uintptr_t)&base->control) |
114 		      I2C_CONTROL_START);
115 
116 	/* in case that the int flag was set before i.e. repeated start bit */
117 	if (is_int_flag) {
118 		VERBOSE("%s: repeated start Bit\n", __func__);
119 		mentor_i2c_interrupt_clear();
120 	}
121 
122 	if (mentor_i2c_wait_interrupt()) {
123 		ERROR("Start clear bit timeout\n");
124 		return -ETIMEDOUT;
125 	}
126 
127 	/* check that start bit went down */
128 	if ((mmio_read_32((uintptr_t)&base->control) &
129 	    I2C_CONTROL_START) != 0) {
130 		ERROR("Start bit didn't went down\n");
131 		return -EPERM;
132 	}
133 
134 	/* check the status */
135 	if (mentor_i2c_lost_arbitration(&status)) {
136 		ERROR("%s - %d: Lost arbitration, got status %x\n",
137 		      __func__, __LINE__, status);
138 		return -EAGAIN;
139 	}
140 	if ((status != I2C_STATUS_START) &&
141 	    (status != I2C_STATUS_REPEATED_START)) {
142 		ERROR("Got status %x after enable start bit.\n", status);
143 		return -EPERM;
144 	}
145 
146 	return 0;
147 }
148 
149 static int mentor_i2c_stop_bit_set(void)
150 {
151 	int timeout;
152 	uint32_t status;
153 
154 	/* Generate stop bit */
155 	mmio_write_32((uintptr_t)&base->control,
156 		      mmio_read_32((uintptr_t)&base->control) |
157 		      I2C_CONTROL_STOP);
158 	mentor_i2c_interrupt_clear();
159 
160 	timeout = 0;
161 	/* Read control register, check the control stop bit */
162 	while ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) &&
163 	       (timeout++ < I2C_TIMEOUT_VALUE))
164 		;
165 	if (timeout >= I2C_TIMEOUT_VALUE) {
166 		ERROR("Stop bit didn't went down\n");
167 		return -ETIMEDOUT;
168 	}
169 
170 	/* check that stop bit went down */
171 	if ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) != 0) {
172 		ERROR("Stop bit didn't went down\n");
173 		return -EPERM;
174 	}
175 
176 	/* check the status */
177 	if (mentor_i2c_lost_arbitration(&status)) {
178 		ERROR("%s - %d: Lost arbitration, got status %x\n",
179 		      __func__, __LINE__, status);
180 		return -EAGAIN;
181 	}
182 	if (status != I2C_STATUS_IDLE) {
183 		ERROR("Got status %x after enable stop bit.\n", status);
184 		return -EPERM;
185 	}
186 
187 	return 0;
188 }
189 
190 static int mentor_i2c_address_set(uint8_t chain, int command)
191 {
192 	uint32_t reg, status;
193 
194 	reg = (chain << I2C_DATA_ADDR_7BIT_OFFS) & I2C_DATA_ADDR_7BIT_MASK;
195 	reg |= command;
196 	mmio_write_32((uintptr_t)&base->data, reg);
197 	udelay(1);
198 
199 	mentor_i2c_interrupt_clear();
200 
201 	if (mentor_i2c_wait_interrupt()) {
202 		ERROR("Start clear bit timeout\n");
203 		return -ETIMEDOUT;
204 	}
205 
206 	/* check the status */
207 	if (mentor_i2c_lost_arbitration(&status)) {
208 		ERROR("%s - %d: Lost arbitration, got status %x\n",
209 		      __func__, __LINE__, status);
210 		return -EAGAIN;
211 	}
212 	if (((status != I2C_STATUS_ADDR_R_ACK) && (command == I2C_CMD_READ)) ||
213 	   ((status != I2C_STATUS_ADDR_W_ACK) && (command == I2C_CMD_WRITE))) {
214 		/* only in debug, since in boot we try to read the SPD
215 		 * of both DRAM, and we don't want error messages in cas
216 		 * DIMM doesn't exist.
217 		 */
218 		INFO("%s: ERROR - status %x addr in %s mode.\n", __func__,
219 		     status, (command == I2C_CMD_WRITE) ? "Write" : "Read");
220 		return -EPERM;
221 	}
222 
223 	return 0;
224 }
225 
226 /*
227  * The I2C module contains a clock divider to generate the SCL clock.
228  * This function calculates and sets the <N> and <M> fields in the I2C Baud
229  * Rate Register (t=01) to obtain given 'requested_speed'.
230  * The requested_speed will be equal to:
231  * CONFIG_SYS_TCLK / (10 * (M + 1) * (2 << N))
232  * Where M is the value represented by bits[6:3] and N is the value represented
233  * by bits[2:0] of "I2C Baud Rate Register".
234  * Therefore max M which can be set is 16 (2^4) and max N is 8 (2^3). So the
235  * lowest possible baudrate is:
236  * CONFIG_SYS_TCLK/(10 * (16 +1) * (2 << 8), which equals to:
237  * CONFIG_SYS_TCLK/87040. Assuming that CONFIG_SYS_TCLK=250MHz, the lowest
238  * possible frequency is ~2,872KHz.
239  */
240 static unsigned int mentor_i2c_bus_speed_set(unsigned int requested_speed)
241 {
242 	unsigned int n, m, freq, margin, min_margin = 0xffffffff;
243 	unsigned int actual_n = 0, actual_m = 0;
244 	int val;
245 
246 	/* Calculate N and M for the TWSI clock baud rate */
247 	for (n = 0; n < 8; n++) {
248 		for (m = 0; m < 16; m++) {
249 			freq = CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
250 			val = requested_speed - freq;
251 			margin = (val > 0) ? val : -val;
252 
253 			if ((freq <= requested_speed) &&
254 			    (margin < min_margin)) {
255 				min_margin = margin;
256 				actual_n = n;
257 				actual_m = m;
258 			}
259 		}
260 	}
261 	VERBOSE("%s: actual_n = %u, actual_m = %u\n",
262 		__func__, actual_n, actual_m);
263 	/* Set the baud rate */
264 	mmio_write_32((uintptr_t)&base->baudrate, (actual_m << 3) | actual_n);
265 
266 	return 0;
267 }
268 
269 #ifdef DEBUG_I2C
270 static int mentor_i2c_probe(uint8_t chip)
271 {
272 	int ret = 0;
273 
274 	ret = mentor_i2c_start_bit_set();
275 	if (ret != 0) {
276 		mentor_i2c_stop_bit_set();
277 		ERROR("%s - %d: %s", __func__, __LINE__,
278 		      "mentor_i2c_start_bit_set failed\n");
279 		return -EPERM;
280 	}
281 
282 	ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
283 	if (ret != 0) {
284 		mentor_i2c_stop_bit_set();
285 		ERROR("%s - %d: %s", __func__, __LINE__,
286 		      "mentor_i2c_address_set failed\n");
287 		return -EPERM;
288 	}
289 
290 	mentor_i2c_stop_bit_set();
291 
292 	VERBOSE("%s: successful I2C probe\n", __func__);
293 
294 	return ret;
295 }
296 #endif
297 
298 /* regular i2c transaction */
299 static int mentor_i2c_data_receive(uint8_t *p_block, uint32_t block_size)
300 {
301 	uint32_t reg, status, block_size_read = block_size;
302 
303 	/* Wait for cause interrupt */
304 	if (mentor_i2c_wait_interrupt()) {
305 		ERROR("Start clear bit timeout\n");
306 		return -ETIMEDOUT;
307 	}
308 	while (block_size_read) {
309 		if (block_size_read == 1) {
310 			reg = mmio_read_32((uintptr_t)&base->control);
311 			reg &= ~(I2C_CONTROL_ACK);
312 			mmio_write_32((uintptr_t)&base->control, reg);
313 		}
314 		mentor_i2c_interrupt_clear();
315 
316 		if (mentor_i2c_wait_interrupt()) {
317 			ERROR("Start clear bit timeout\n");
318 			return -ETIMEDOUT;
319 		}
320 		/* check the status */
321 		if (mentor_i2c_lost_arbitration(&status)) {
322 			ERROR("%s - %d: Lost arbitration, got status %x\n",
323 			      __func__, __LINE__, status);
324 			return -EAGAIN;
325 		}
326 		if ((status != I2C_STATUS_DATA_R_ACK) &&
327 		    (block_size_read != 1)) {
328 			ERROR("Status %x in read transaction\n", status);
329 			return -EPERM;
330 		}
331 		if ((status != I2C_STATUS_DATA_R_NAK) &&
332 		    (block_size_read == 1)) {
333 			ERROR("Status %x in Rd Terminate\n", status);
334 			return -EPERM;
335 		}
336 
337 		/* read the data */
338 		*p_block = (uint8_t) mmio_read_32((uintptr_t)&base->data);
339 		VERBOSE("%s: place %d read %x\n", __func__,
340 			block_size - block_size_read, *p_block);
341 		p_block++;
342 		block_size_read--;
343 	}
344 
345 	return 0;
346 }
347 
348 static int mentor_i2c_data_transmit(uint8_t *p_block, uint32_t block_size)
349 {
350 	uint32_t status, block_size_write = block_size;
351 
352 	if (mentor_i2c_wait_interrupt()) {
353 		ERROR("Start clear bit timeout\n");
354 		return -ETIMEDOUT;
355 	}
356 
357 	while (block_size_write) {
358 		/* write the data */
359 		mmio_write_32((uintptr_t)&base->data, (uint32_t) *p_block);
360 		VERBOSE("%s: index = %d, data = %x\n", __func__,
361 			block_size - block_size_write, *p_block);
362 		p_block++;
363 		block_size_write--;
364 
365 		mentor_i2c_interrupt_clear();
366 
367 		if (mentor_i2c_wait_interrupt()) {
368 			ERROR("Start clear bit timeout\n");
369 			return -ETIMEDOUT;
370 		}
371 
372 		/* check the status */
373 		if (mentor_i2c_lost_arbitration(&status)) {
374 			ERROR("%s - %d: Lost arbitration, got status %x\n",
375 			      __func__, __LINE__, status);
376 			return -EAGAIN;
377 		}
378 		if (status != I2C_STATUS_DATA_W_ACK) {
379 			ERROR("Status %x in write transaction\n", status);
380 			return -EPERM;
381 		}
382 	}
383 
384 	return 0;
385 }
386 
387 static int mentor_i2c_target_offset_set(uint8_t chip, uint32_t addr, int alen)
388 {
389 	uint8_t off_block[2];
390 	uint32_t off_size;
391 
392 	if (alen == 2) { /* 2-byte addresses support */
393 		off_block[0] = (addr >> 8) & 0xff;
394 		off_block[1] = addr & 0xff;
395 		off_size = 2;
396 	} else { /* 1-byte addresses support */
397 		off_block[0] = addr & 0xff;
398 		off_size = 1;
399 	}
400 	VERBOSE("%s: off_size = %x addr1 = %x addr2 = %x\n", __func__,
401 		off_size, off_block[0], off_block[1]);
402 	return mentor_i2c_data_transmit(off_block, off_size);
403 }
404 
405 #ifdef I2C_CAN_UNSTUCK
406 static int mentor_i2c_unstuck(int ret)
407 {
408 	uint32_t v;
409 
410 	if (ret != -ETIMEDOUT)
411 		return ret;
412 	VERBOSE("Trying to \"unstuck i2c\"... ");
413 	i2c_init(base);
414 	mmio_write_32((uintptr_t)&base->unstuck, I2C_UNSTUCK_TRIGGER);
415 	do {
416 		v = mmio_read_32((uintptr_t)&base->unstuck);
417 	} while (v & I2C_UNSTUCK_ONGOING);
418 
419 	if (v & I2C_UNSTUCK_ERROR) {
420 		VERBOSE("failed - soft reset i2c\n");
421 		ret = -EPERM;
422 	} else {
423 		VERBOSE("ok\n");
424 		i2c_init(base);
425 		ret = -EAGAIN;
426 	}
427 	return ret;
428 }
429 #else
430 static int mentor_i2c_unstuck(int ret)
431 {
432 	VERBOSE("Cannot \"unstuck i2c\" - soft reset i2c\n");
433 	return -EPERM;
434 }
435 #endif
436 
437 /*
438  * API Functions
439  */
440 void i2c_init(void *i2c_base)
441 {
442 	/* For I2C speed and slave address, now we do not set them since
443 	 * we just provide the working speed and slave address otherwhere
444 	 * for i2c_init
445 	 */
446 	base = (struct mentor_i2c_regs *)i2c_base;
447 
448 	/* Reset the I2C logic */
449 	mmio_write_32((uintptr_t)&base->soft_reset, 0);
450 
451 	udelay(200);
452 
453 	mentor_i2c_bus_speed_set(CONFIG_SYS_I2C_SPEED);
454 
455 	/* Enable the I2C and slave */
456 	mmio_write_32((uintptr_t)&base->control,
457 		      I2C_CONTROL_TWSIEN | I2C_CONTROL_ACK);
458 
459 	/* set the I2C slave address */
460 	mmio_write_32((uintptr_t)&base->xtnd_slave_addr, 0);
461 	mmio_write_32((uintptr_t)&base->slave_address, CONFIG_SYS_I2C_SLAVE);
462 
463 	/* unmask I2C interrupt */
464 	mmio_write_32((uintptr_t)&base->control,
465 		      mmio_read_32((uintptr_t)&base->control) |
466 		      I2C_CONTROL_INTEN);
467 
468 	udelay(10);
469 }
470 
471 /*
472  * i2c_read: - Read multiple bytes from an i2c device
473  *
474  * The higher level routines take into account that this function is only
475  * called with len < page length of the device (see configuration file)
476  *
477  * @chip:	address of the chip which is to be read
478  * @addr:	i2c data address within the chip
479  * @alen:	length of the i2c data address (1..2 bytes)
480  * @buffer:	where to write the data
481  * @len:	how much byte do we want to read
482  * @return:	0 in case of success
483  */
484 int i2c_read(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len)
485 {
486 	int ret = 0;
487 	uint32_t counter = 0;
488 
489 #ifdef DEBUG_I2C
490 	mentor_i2c_probe(chip);
491 #endif
492 
493 	do {
494 		if (ret != -EAGAIN && ret) {
495 			ERROR("i2c transaction failed, after %d retries\n",
496 			      counter);
497 			mentor_i2c_stop_bit_set();
498 			return ret;
499 		}
500 
501 		/* wait for 1 us for the interrupt clear to take effect */
502 		if (counter > 0)
503 			udelay(1);
504 		counter++;
505 
506 		ret = mentor_i2c_start_bit_set();
507 		if (ret) {
508 			ret = mentor_i2c_unstuck(ret);
509 			continue;
510 		}
511 
512 		/* if EEPROM device */
513 		if (alen != 0) {
514 			ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
515 			if (ret)
516 				continue;
517 
518 			ret = mentor_i2c_target_offset_set(chip, addr, alen);
519 			if (ret)
520 				continue;
521 			ret = mentor_i2c_start_bit_set();
522 			if (ret)
523 				continue;
524 		}
525 
526 		ret =  mentor_i2c_address_set(chip, I2C_CMD_READ);
527 		if (ret)
528 			continue;
529 
530 		ret = mentor_i2c_data_receive(buffer, len);
531 		if (ret)
532 			continue;
533 
534 		ret =  mentor_i2c_stop_bit_set();
535 	} while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT));
536 
537 	if (counter == I2C_MAX_RETRY_CNT) {
538 		ERROR("I2C transactions failed, got EAGAIN %d times\n",
539 		      I2C_MAX_RETRY_CNT);
540 		ret = -EPERM;
541 	}
542 	mmio_write_32((uintptr_t)&base->control,
543 		      mmio_read_32((uintptr_t)&base->control) |
544 		      I2C_CONTROL_ACK);
545 
546 	udelay(1);
547 	return ret;
548 }
549 
550 /*
551  * i2c_write: -  Write multiple bytes to an i2c device
552  *
553  * The higher level routines take into account that this function is only
554  * called with len < page length of the device (see configuration file)
555  *
556  * @chip:	address of the chip which is to be written
557  * @addr:	i2c data address within the chip
558  * @alen:	length of the i2c data address (1..2 bytes)
559  * @buffer:	where to find the data to be written
560  * @len:	how much byte do we want to read
561  * @return:	0 in case of success
562  */
563 int i2c_write(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len)
564 {
565 	int ret = 0;
566 	uint32_t counter = 0;
567 
568 	do {
569 		if (ret != -EAGAIN && ret) {
570 			ERROR("i2c transaction failed\n");
571 			mentor_i2c_stop_bit_set();
572 			return ret;
573 		}
574 		/* wait for 1 us for the interrupt clear to take effect */
575 		if (counter > 0)
576 			udelay(1);
577 		counter++;
578 
579 		ret = mentor_i2c_start_bit_set();
580 		if (ret) {
581 			ret = mentor_i2c_unstuck(ret);
582 			continue;
583 		}
584 
585 		ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
586 		if (ret)
587 			continue;
588 
589 		/* if EEPROM device */
590 		if (alen != 0) {
591 			ret = mentor_i2c_target_offset_set(chip, addr, alen);
592 			if (ret)
593 				continue;
594 		}
595 
596 		ret = mentor_i2c_data_transmit(buffer, len);
597 		if (ret)
598 			continue;
599 
600 		ret = mentor_i2c_stop_bit_set();
601 	} while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT));
602 
603 	if (counter == I2C_MAX_RETRY_CNT) {
604 		ERROR("I2C transactions failed, got EAGAIN %d times\n",
605 		      I2C_MAX_RETRY_CNT);
606 		ret = -EPERM;
607 	}
608 
609 	udelay(1);
610 	return ret;
611 }
612