1/* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <asm_macros.S> 8#include <assert_macros.S> 9#include <xlat_tables_v2.h> 10 11 .global enable_mmu_direct_el1 12 .global enable_mmu_direct_el2 13 .global enable_mmu_direct_el3 14 15 /* Macros to read and write to system register for a given EL. */ 16 .macro _msr reg_name, el, gp_reg 17 msr \reg_name\()_el\()\el, \gp_reg 18 .endm 19 20 .macro _mrs gp_reg, reg_name, el 21 mrs \gp_reg, \reg_name\()_el\()\el 22 .endm 23 24 .macro tlbi_invalidate_all el 25 .if \el == 1 26 TLB_INVALIDATE(vmalle1) 27 .elseif \el == 2 28 TLB_INVALIDATE(alle2) 29 .elseif \el == 3 30 TLB_INVALIDATE(alle3) 31 .else 32 .error "EL must be 1, 2 or 3" 33 .endif 34 .endm 35 36 /* void enable_mmu_direct_el<x>(unsigned int flags) */ 37 .macro define_mmu_enable_func el 38 func enable_mmu_direct_\()el\el 39#if ENABLE_ASSERTIONS 40 _mrs x1, sctlr, \el 41 tst x1, #SCTLR_M_BIT 42 ASM_ASSERT(eq) 43#endif 44 /* Invalidate all TLB entries */ 45 tlbi_invalidate_all \el 46 47 mov x7, x0 48 ldr x0, =mmu_cfg_params 49 50 /* MAIR */ 51 ldr x1, [x0, #(MMU_CFG_MAIR << 3)] 52 _msr mair, \el, x1 53 54 /* TCR */ 55 ldr x2, [x0, #(MMU_CFG_TCR << 3)] 56 _msr tcr, \el, x2 57 58 /* TTBR */ 59 ldr x3, [x0, #(MMU_CFG_TTBR0 << 3)] 60 _msr ttbr0, \el, x3 61 62 /* 63 * Ensure all translation table writes have drained into memory, the TLB 64 * invalidation is complete, and translation register writes are 65 * committed before enabling the MMU 66 */ 67 dsb ish 68 isb 69 70 /* Set and clear required fields of SCTLR */ 71 _mrs x4, sctlr, \el 72 mov_imm x5, SCTLR_WXN_BIT | SCTLR_C_BIT | SCTLR_M_BIT 73 orr x4, x4, x5 74 75 /* Additionally, amend SCTLR fields based on flags */ 76 bic x5, x4, #SCTLR_C_BIT 77 tst x7, #DISABLE_DCACHE 78 csel x4, x5, x4, ne 79 80 _msr sctlr, \el, x4 81 isb 82 83 ret 84 endfunc enable_mmu_direct_\()el\el 85 .endm 86 87 /* 88 * Define MMU-enabling functions for EL1 and EL3: 89 * 90 * enable_mmu_direct_el1 91 * enable_mmu_direct_el3 92 */ 93 define_mmu_enable_func 1 94 define_mmu_enable_func 2 95 define_mmu_enable_func 3 96