feat(cpufeat): enable USE_SPINLOCK_CAS to FEAT_STATE_CHECKEDThe FEAT_LSE enablement predates the FEAT_STATE framework and has neverbeen converted. Since the introduction of USE_SPINLOCK_CAS we've
feat(cpufeat): enable USE_SPINLOCK_CAS to FEAT_STATE_CHECKEDThe FEAT_LSE enablement predates the FEAT_STATE framework and has neverbeen converted. Since the introduction of USE_SPINLOCK_CAS we've gainedlots of quality of life features that allow for better featureenablement. This patch converts USE_SPINLOCK_CAS to tri-state and addsit to FEATURE_DETECTION to align with all other features.Instead of introducing the assembly checking for tri-state, this patchtranslates all locking routines to C inline assembly and uses thestandard C helpers. The main benefit is that this gives greatervisibility to the compiler about what the functions are doing and letsit optimise better. Namely, it is able to allocate registers itself andinline the functions when LTO is enabled.An unsuccessful attempt was made to use the instructions directly andhave even flow control in C. This, however, made code very complicatedand less efficient in the tight loops of the spinlock.The last use of ARM_ARCH_AT_LEAST goes away with this change and so thismacro is removed. It has now been fully superseded by the FEAT_STATEframework.This change exposes a limitation - RME_GPT_BITLOCK_BLOCK requiresUSE_SPINLOCK_CAS. This patch does not address this in any way but makesthe relationship explicit.Change-Id: I580081549aceded2dca3e0f4564ee7510a7e56aeSigned-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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fix(locks): mark spin_trylock as a public functionThis patch updates spinlock.S to make the spin_trylock helperfunction as public. This will allow other parts of the TF-Ato use this function.Ch
fix(locks): mark spin_trylock as a public functionThis patch updates spinlock.S to make the spin_trylock helperfunction as public. This will allow other parts of the TF-Ato use this function.Change-Id: Id264a36490707a9377a221ed2b5bd27ca90bf459Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
feat(locks): add non-blocking spinlock_try() APIAdd a non-blocking `spin_trylock()` function to the existing spinlockimplementation. This API attempts to acquire the lock and returns `1`on succes
feat(locks): add non-blocking spinlock_try() APIAdd a non-blocking `spin_trylock()` function to the existing spinlockimplementation. This API attempts to acquire the lock and returns `1`on success or `0` if the lock is already held. It enables conditionallocking scenarios where blocking is undesirable.Change-Id: I9483206952d1a34dc245ebf69e80c3645b658946Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
feat(locks): add bitlockThis patch adds 'bitlock_t' type and bit_lock() andbit_unlock() to support locking/release functionalitybased on individual bit position. These functions useatomic bit se
feat(locks): add bitlockThis patch adds 'bitlock_t' type and bit_lock() andbit_unlock() to support locking/release functionalitybased on individual bit position. These functions useatomic bit set and clear instructions which requireFEAT_LSE mandatory from Armv8.1.Change-Id: I3eb0f29bbccefe6c0f69061aa701187a6364df0cSigned-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
chore: update to use Arm word across TF-AAlign entire TF-A to use Arm in copyright header.Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244Signed-off-by: Govindraj Raja <govindraj.raja@arm.co
chore: update to use Arm word across TF-AAlign entire TF-A to use Arm in copyright header.Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Fix the CAS spinlock implementationMake the spinlock implementation use ARMv8.1-LSE CAS instruction basedon a platform build option. The CAS-based implementation used to beunconditionally selecte
Fix the CAS spinlock implementationMake the spinlock implementation use ARMv8.1-LSE CAS instruction basedon a platform build option. The CAS-based implementation used to beunconditionally selected for all ARM8.1+ platforms.The previous CAS spinlock implementation had a bug wherein the spin_unlock()implementation had an `sev` after `stlr` which is not sufficient. A dsb isneeded to ensure that the stlr completes prior to the sev. Having a dsb isheavyweight and a better solution would be to use load exclusive semanticsto monitor the lock and wake up from wfe when a store happens to the lock.The patch implements the same.Change-Id: I5283ce4a889376e4cc01d1b9d09afa8229a2e522Signed-off-by: Soby Mathew <soby.mathew@arm.com>Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Remove .arch directives from spinlock.SThis patch removes .arch "arm8.1-a" and "armv8-a"directives which overwrite ASFLAGS_aarch64 option basedon ARM_ARCH_MINOR passed to Makefile and causetrans
Remove .arch directives from spinlock.SThis patch removes .arch "arm8.1-a" and "armv8-a"directives which overwrite ASFLAGS_aarch64 option basedon ARM_ARCH_MINOR passed to Makefile and causetranslation errors like"selected processor does not support `bti jc'"for armv8.5-a targets when BTI support is enabled.Change-Id: Idca5b66ed1e5d86e2188b0c0f16c3819990957c4Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Remove all other deprecated interfaces and filesChange-Id: Icd1cdd42afdc78895a9be6c46b414b0a155cfa63Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
ARMv7 does not support STL instructionAlso need to add a SEV instruction in ARMv7 spin_unlock whichis implicit in ARMv8.Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Add macro to test for minimum architecture versionThe macro concisely expresses and requires architecture version to be atleast as required by its arguments. This would be useful when extendingTr
Add macro to test for minimum architecture versionThe macro concisely expresses and requires architecture version to be atleast as required by its arguments. This would be useful when extendingTrusted Firmware functionality for future architecture revisions.Replace similar usage in the current code base with the new macro.Change-Id: I9dcd0aa71a663eabd02ed9632b8ce87611fa5a57Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Use SPDX license identifiersTo make software license auditing simpler, use SPDX[0] licenseidentifiers instead of duplicating the license text in every file.NOTE: Files that have been imported by
Use SPDX license identifiersTo make software license auditing simpler, use SPDX[0] licenseidentifiers instead of duplicating the license text in every file.NOTE: Files that have been imported by FreeBSD have not been modified.[0]: https://spdx.org/Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761aSigned-off-by: dp-arm <dimitris.papastamos@arm.com>
Introduce locking primitives using CAS instructionThe ARMv8v.1 architecture extension has introduced support for faratomics, which includes compare-and-swap. Compare and Swap instructionis only a
Introduce locking primitives using CAS instructionThe ARMv8v.1 architecture extension has introduced support for faratomics, which includes compare-and-swap. Compare and Swap instructionis only available for AArch64.Introduce build options to choose the architecture versions to targetARM Trusted Firmware: - ARM_ARCH_MAJOR: selects the major version of target ARM Architecture. Default value is 8. - ARM_ARCH_MINOR: selects the minor version of target ARM Architecture. Default value is 0.When: (ARM_ARCH_MAJOR > 8) || ((ARM_ARCH_MAJOR == 8) && (ARM_ARCH_MINOR >= 1)),for AArch64, Compare and Swap instruction is used to implement spinlocks. Otherwise, the implementation falls back to usingload-/store-exclusive instructions.Update user guide, and introduce a section in Firmware Design guide tosummarize support for features introduced in ARMv8 ArchitectureExtensions.Change-Id: I73096a0039502f7aef9ec6ab3ae36680da033f16Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
AArch32: Add support in TF librariesThis patch adds AArch32 support to cpu ops, context management,per-cpu data and spinlock libraries. The `entrypoint_info`structure is modified to add support f
AArch32: Add support in TF librariesThis patch adds AArch32 support to cpu ops, context management,per-cpu data and spinlock libraries. The `entrypoint_info`structure is modified to add support for AArch32 registerarguments. The CPU operations for AEM generic cpu in AArch32mode is also added.Change-Id: I1e52e79f498661d8f31f1e7b3a29e222bc7a4483
Move spinlock library code to AArch64 folderThis patch moves the assembly exclusive lock library code`spinlock.S` into architecture specific folder `aarch64`.A stub file which includes the file f
Move spinlock library code to AArch64 folderThis patch moves the assembly exclusive lock library code`spinlock.S` into architecture specific folder `aarch64`.A stub file which includes the file from new location isretained at the original location for compatibility. The BLmakefiles are also modified to include the file from the newlocation.Change-Id: Ide0b601b79c439e390c3a017d93220a66be73543
Add support to indicate size and end of assembly functionsIn order for the symbol table in the ELF file to contain the size offunctions written in assembly, it is necessary to report it to theass
Add support to indicate size and end of assembly functionsIn order for the symbol table in the ELF file to contain the size offunctions written in assembly, it is necessary to report it to theassembler using the .size directive.To fulfil the above requirements, this patch introduces an 'endfunc'macro which contains the .endfunc and .size directives. It also addsa .func directive to the 'func' assembler macro.The .func/.endfunc have been used so the assembler can fail ifendfunc is omitted.Fixes ARM-Software/tf-issues#295Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fcSigned-off-by: Kévin Petit <kevin.petit@arm.com>
Move include and source files to logical locationsMove almost all system include files to a logical sub-directoryunder ./include. The only remaining system include directoriesnot under ./include
Move include and source files to logical locationsMove almost all system include files to a logical sub-directoryunder ./include. The only remaining system include directoriesnot under ./include are specific to the platform. Move thecorresponding source files to match the include directorystructure.Also remove pm.h as it is no longer used.Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3