1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __CORTEX_A32_H__ 8 #define __CORTEX_A32_H__ 9 10 /* Cortex-A32 Main ID register for revision 0 */ 11 #define CORTEX_A32_MIDR 0x410FD010 12 13 /******************************************************************************* 14 * CPU Extended Control register specific definitions. 15 * CPUECTLR_EL1 is an implementation-specific register. 16 ******************************************************************************/ 17 #define CORTEX_A32_CPUECTLR_EL1 p15, 1, c15 18 #define CORTEX_A32_CPUECTLR_SMPEN_BIT (1 << 6) 19 20 #endif /* __CORTEX_A32_H__ */ 21