1/* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6#ifndef __ROCKCHIP_PLAT_LD_S__ 7#define __ROCKCHIP_PLAT_LD_S__ 8 9MEMORY { 10 SRAM (rwx): ORIGIN = SRAM_BASE, LENGTH = SRAM_SIZE 11} 12 13SECTIONS 14{ 15 . = SRAM_BASE; 16 ASSERT(. == ALIGN(4096), 17 "SRAM_BASE address is not aligned on a page boundary.") 18 19 /* 20 * The SRAM space allocation for RK3399 21 * ---------------- 22 * | m0 code bin 23 * ---------------- 24 * | sram text 25 * ---------------- 26 * | sram data 27 * ---------------- 28 */ 29 .incbin_sram : ALIGN(4096) { 30 __sram_incbin_start = .; 31 *(.sram.incbin) 32 . = ALIGN(4096); 33 __sram_incbin_end = .; 34 } >SRAM 35 36 .text_sram : ALIGN(4096) { 37 __bl31_sram_text_start = .; 38 *(.sram.text) 39 *(.sram.rodata) 40 . = ALIGN(4096); 41 __bl31_sram_text_end = .; 42 } >SRAM 43 44 .data_sram : ALIGN(4096) { 45 __bl31_sram_data_start = .; 46 *(.sram.data) 47 . = ALIGN(4096); 48 __bl31_sram_data_end = .; 49 } >SRAM 50} 51 52#endif /* __ROCKCHIP_PLAT_LD_S__ */ 53