xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/pmc.h (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1 /*
2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __PMC_H__
8 #define __PMC_H__
9 
10 #include <mmio.h>
11 #include <tegra_def.h>
12 
13 #define PMC_CONFIG				0x0U
14 #define PMC_PWRGATE_STATUS			0x38U
15 #define PMC_PWRGATE_TOGGLE			0x30U
16 #define  PMC_TOGGLE_START			0x100U
17 #define PMC_SCRATCH39				0x138U
18 #define PMC_SECURE_DISABLE2			0x2c4U
19 #define  PMC_SECURE_DISABLE2_WRITE22_ON		(1U << 28)
20 #define PMC_SECURE_SCRATCH22			0x338U
21 #define PMC_SECURE_DISABLE3			0x2d8U
22 #define  PMC_SECURE_DISABLE3_WRITE34_ON		(1U << 20)
23 #define  PMC_SECURE_DISABLE3_WRITE35_ON		(1U << 22)
24 #define PMC_SECURE_SCRATCH34			0x368U
25 #define PMC_SECURE_SCRATCH35			0x36cU
26 
27 static inline uint32_t tegra_pmc_read_32(uint32_t off)
28 {
29 	return mmio_read_32(TEGRA_PMC_BASE + off);
30 }
31 
32 static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
33 {
34 	mmio_write_32(TEGRA_PMC_BASE + off, val);
35 }
36 
37 void tegra_pmc_cpu_setup(uint64_t reset_addr);
38 void tegra_pmc_lock_cpu_vectors(void);
39 void tegra_pmc_cpu_on(int cpu);
40 __dead2 void tegra_pmc_system_reset(void);
41 
42 #endif /* __PMC_H__ */
43