1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __GIC_H__ 32 #define __GIC_H__ 33 34 #define MAX_SPIS 480 35 #define MAX_PPIS 14 36 #define MAX_SGIS 16 37 38 #define GRP0 0 39 #define GRP1 1 40 #define GIC_PRI_MASK 0xff 41 #define GIC_HIGHEST_SEC_PRIORITY 0 42 #define GIC_LOWEST_SEC_PRIORITY 127 43 #define GIC_HIGHEST_NS_PRIORITY 128 44 #define GIC_LOWEST_NS_PRIORITY 254 /* 255 would disable an interrupt */ 45 46 #define ENABLE_GRP0 (1 << 0) 47 #define ENABLE_GRP1 (1 << 1) 48 49 /* Distributor interface definitions */ 50 #define GICD_CTLR 0x0 51 #define GICD_TYPER 0x4 52 #define GICD_IGROUPR 0x80 53 #define GICD_ISENABLER 0x100 54 #define GICD_ICENABLER 0x180 55 #define GICD_ISPENDR 0x200 56 #define GICD_ICPENDR 0x280 57 #define GICD_ISACTIVER 0x300 58 #define GICD_ICACTIVER 0x380 59 #define GICD_IPRIORITYR 0x400 60 #define GICD_ITARGETSR 0x800 61 #define GICD_ICFGR 0xC00 62 #define GICD_SGIR 0xF00 63 #define GICD_CPENDSGIR 0xF10 64 #define GICD_SPENDSGIR 0xF20 65 66 #define IGROUPR_SHIFT 5 67 #define ISENABLER_SHIFT 5 68 #define ICENABLER_SHIFT ISENABLER_SHIFT 69 #define ISPENDR_SHIFT 5 70 #define ICPENDR_SHIFT ISPENDR_SHIFT 71 #define ISACTIVER_SHIFT 5 72 #define ICACTIVER_SHIFT ISACTIVER_SHIFT 73 #define IPRIORITYR_SHIFT 2 74 #define ITARGETSR_SHIFT 2 75 #define ICFGR_SHIFT 4 76 #define CPENDSGIR_SHIFT 2 77 #define SPENDSGIR_SHIFT CPENDSGIR_SHIFT 78 79 /* GICD_TYPER bit definitions */ 80 #define IT_LINES_NO_MASK 0x1f 81 82 /* Physical CPU Interface registers */ 83 #define GICC_CTLR 0x0 84 #define GICC_PMR 0x4 85 #define GICC_BPR 0x8 86 #define GICC_IAR 0xC 87 #define GICC_EOIR 0x10 88 #define GICC_RPR 0x14 89 #define GICC_HPPIR 0x18 90 #define GICC_IIDR 0xFC 91 #define GICC_DIR 0x1000 92 #define GICC_PRIODROP GICC_EOIR 93 94 /* GICC_CTLR bit definitions */ 95 #define EOI_MODE_NS (1 << 10) 96 #define EOI_MODE_S (1 << 9) 97 #define IRQ_BYP_DIS_GRP1 (1 << 8) 98 #define FIQ_BYP_DIS_GRP1 (1 << 7) 99 #define IRQ_BYP_DIS_GRP0 (1 << 6) 100 #define FIQ_BYP_DIS_GRP0 (1 << 5) 101 #define CBPR (1 << 4) 102 #define FIQ_EN (1 << 3) 103 #define ACK_CTL (1 << 2) 104 105 /* GICC_IIDR bit masks and shifts */ 106 #define GICC_IIDR_PID_SHIFT 20 107 #define GICC_IIDR_ARCH_SHIFT 16 108 #define GICC_IIDR_REV_SHIFT 12 109 #define GICC_IIDR_IMP_SHIFT 0 110 111 #define GICC_IIDR_PID_MASK 0xfff 112 #define GICC_IIDR_ARCH_MASK 0xf 113 #define GICC_IIDR_REV_MASK 0xf 114 #define GICC_IIDR_IMP_MASK 0xfff 115 116 /* HYP view virtual CPU Interface registers */ 117 #define GICH_CTL 0x0 118 #define GICH_VTR 0x4 119 #define GICH_ELRSR0 0x30 120 #define GICH_ELRSR1 0x34 121 #define GICH_APR0 0xF0 122 #define GICH_LR_BASE 0x100 123 124 /* Virtual CPU Interface registers */ 125 #define GICV_CTL 0x0 126 #define GICV_PRIMASK 0x4 127 #define GICV_BP 0x8 128 #define GICV_INTACK 0xC 129 #define GICV_EOI 0x10 130 #define GICV_RUNNINGPRI 0x14 131 #define GICV_HIGHESTPEND 0x18 132 #define GICV_DEACTIVATE 0x1000 133 134 /* GICv3 Re-distributor interface registers & shifts */ 135 #define GICR_PCPUBASE_SHIFT 0x11 136 #define GICR_TYPER 0x08 137 #define GICR_WAKER 0x14 138 139 /* GICR_WAKER bit definitions */ 140 #define WAKER_CA (1UL << 2) 141 #define WAKER_PS (1UL << 1) 142 143 /* GICR_TYPER bit definitions */ 144 #define GICR_TYPER_AFF_SHIFT 32 145 #define GICR_TYPER_AFF_MASK 0xffffffff 146 #define GICR_TYPER_LAST (1UL << 4) 147 148 /* GICv3 ICC_SRE register bit definitions*/ 149 #define ICC_SRE_EN (1UL << 3) 150 #define ICC_SRE_SRE (1UL << 0) 151 152 #ifndef __ASSEMBLY__ 153 154 #include <gic_v2.h> 155 #include <gic_v3.h> 156 157 /******************************************************************************* 158 * Function prototypes 159 ******************************************************************************/ 160 161 extern unsigned int gicd_read_igroupr(unsigned int, unsigned int); 162 extern unsigned int gicd_read_isenabler(unsigned int, unsigned int); 163 extern unsigned int gicd_read_icenabler(unsigned int, unsigned int); 164 extern unsigned int gicd_read_ispendr(unsigned int, unsigned int); 165 extern unsigned int gicd_read_icpendr(unsigned int, unsigned int); 166 extern unsigned int gicd_read_isactiver(unsigned int, unsigned int); 167 extern unsigned int gicd_read_icactiver(unsigned int, unsigned int); 168 extern unsigned int gicd_read_ipriorityr(unsigned int, unsigned int); 169 extern unsigned int gicd_read_itargetsr(unsigned int, unsigned int); 170 extern unsigned int gicd_read_icfgr(unsigned int, unsigned int); 171 extern unsigned int gicd_read_cpendsgir(unsigned int, unsigned int); 172 extern unsigned int gicd_read_spendsgir(unsigned int, unsigned int); 173 extern void gicd_write_igroupr(unsigned int, unsigned int, unsigned int); 174 extern void gicd_write_isenabler(unsigned int, unsigned int, unsigned int); 175 extern void gicd_write_icenabler(unsigned int, unsigned int, unsigned int); 176 extern void gicd_write_ispendr(unsigned int, unsigned int, unsigned int); 177 extern void gicd_write_icpendr(unsigned int, unsigned int, unsigned int); 178 extern void gicd_write_isactiver(unsigned int, unsigned int, unsigned int); 179 extern void gicd_write_icactiver(unsigned int, unsigned int, unsigned int); 180 extern void gicd_write_ipriorityr(unsigned int, unsigned int, unsigned int); 181 extern void gicd_write_itargetsr(unsigned int, unsigned int, unsigned int); 182 extern void gicd_write_icfgr(unsigned int, unsigned int, unsigned int); 183 extern void gicd_write_cpendsgir(unsigned int, unsigned int, unsigned int); 184 extern void gicd_write_spendsgir(unsigned int, unsigned int, unsigned int); 185 extern unsigned int gicd_get_igroupr(unsigned int, unsigned int); 186 extern void gicd_set_igroupr(unsigned int, unsigned int); 187 extern void gicd_clr_igroupr(unsigned int, unsigned int); 188 extern void gicd_set_isenabler(unsigned int, unsigned int); 189 extern void gicd_set_icenabler(unsigned int, unsigned int); 190 extern void gicd_set_ispendr(unsigned int, unsigned int); 191 extern void gicd_set_icpendr(unsigned int, unsigned int); 192 extern void gicd_set_isactiver(unsigned int, unsigned int); 193 extern void gicd_set_icactiver(unsigned int, unsigned int); 194 extern void gicd_set_ipriorityr(unsigned int, unsigned int, unsigned int); 195 extern void gicd_set_itargetsr(unsigned int, unsigned int, unsigned int); 196 197 /* GICv3 functions */ 198 199 extern unsigned int read_icc_sre_el1(void); 200 extern unsigned int read_icc_sre_el2(void); 201 extern unsigned int read_icc_sre_el3(void); 202 extern void write_icc_sre_el1(unsigned int); 203 extern void write_icc_sre_el2(unsigned int); 204 extern void write_icc_sre_el3(unsigned int); 205 extern void write_icc_pmr_el1(unsigned int); 206 207 #endif /*__ASSEMBLY__*/ 208 209 #endif /* __GIC_H__ */ 210 211