1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 32 /******************************************************************************* 33 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a 34 * plug-in component to the Secure Monitor, registered as a runtime service. The 35 * SPD is expected to be a functional extension of the Secure Payload (SP) that 36 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting 37 * the Trusted OS/Applications range to the dispatcher. The SPD will either 38 * handle the request locally or delegate it to the Secure Payload. It is also 39 * responsible for initialising and maintaining communication with the SP. 40 ******************************************************************************/ 41 #include <arch_helpers.h> 42 #include <assert.h> 43 #include <bl_common.h> 44 #include <bl31.h> 45 #include <context_mgmt.h> 46 #include <debug.h> 47 #include <errno.h> 48 #include <platform.h> 49 #include <runtime_svc.h> 50 #include <stddef.h> 51 #include <uuid.h> 52 #include "opteed_private.h" 53 #include "teesmc_opteed_macros.h" 54 #include "teesmc_opteed.h" 55 56 /******************************************************************************* 57 * Address of the entrypoint vector table in OPTEE. It is 58 * initialised once on the primary core after a cold boot. 59 ******************************************************************************/ 60 optee_vectors_t *optee_vectors; 61 62 /******************************************************************************* 63 * Array to keep track of per-cpu OPTEE state 64 ******************************************************************************/ 65 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT]; 66 uint32_t opteed_rw; 67 68 69 70 static int32_t opteed_init(void); 71 72 /******************************************************************************* 73 * This function is the handler registered for S-EL1 interrupts by the 74 * OPTEED. It validates the interrupt and upon success arranges entry into 75 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt. 76 ******************************************************************************/ 77 static uint64_t opteed_sel1_interrupt_handler(uint32_t id, 78 uint32_t flags, 79 void *handle, 80 void *cookie) 81 { 82 uint32_t linear_id; 83 uint64_t mpidr; 84 optee_context_t *optee_ctx; 85 86 /* Check the security state when the exception was generated */ 87 assert(get_interrupt_src_ss(flags) == NON_SECURE); 88 89 #if IMF_READ_INTERRUPT_ID 90 /* Check the security status of the interrupt */ 91 assert(plat_ic_get_interrupt_type(id) == INTR_TYPE_S_EL1); 92 #endif 93 94 /* Sanity check the pointer to this cpu's context */ 95 mpidr = read_mpidr(); 96 assert(handle == cm_get_context(NON_SECURE)); 97 98 /* Save the non-secure context before entering the OPTEE */ 99 cm_el1_sysregs_context_save(NON_SECURE); 100 101 /* Get a reference to this cpu's OPTEE context */ 102 linear_id = platform_get_core_pos(mpidr); 103 optee_ctx = &opteed_sp_context[linear_id]; 104 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 105 106 cm_set_elr_el3(SECURE, (uint64_t)&optee_vectors->fiq_entry); 107 cm_el1_sysregs_context_restore(SECURE); 108 cm_set_next_eret_context(SECURE); 109 110 /* 111 * Tell the OPTEE that it has to handle an FIQ (synchronously). 112 * Also the instruction in normal world where the interrupt was 113 * generated is passed for debugging purposes. It is safe to 114 * retrieve this address from ELR_EL3 as the secure context will 115 * not take effect until el3_exit(). 116 */ 117 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3()); 118 } 119 120 /******************************************************************************* 121 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type 122 * (aarch32/aarch64) if not already known and initialises the context for entry 123 * into OPTEE for its initialization. 124 ******************************************************************************/ 125 int32_t opteed_setup(void) 126 { 127 entry_point_info_t *optee_ep_info; 128 uint64_t mpidr = read_mpidr(); 129 uint32_t linear_id; 130 131 linear_id = platform_get_core_pos(mpidr); 132 133 /* 134 * Get information about the Secure Payload (BL32) image. Its 135 * absence is a critical failure. TODO: Add support to 136 * conditionally include the SPD service 137 */ 138 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 139 if (!optee_ep_info) { 140 WARN("No OPTEE provided by BL2 boot loader, Booting device" 141 " without OPTEE initialization. SMC`s destined for OPTEE" 142 " will return SMC_UNK\n"); 143 return 1; 144 } 145 146 /* 147 * If there's no valid entry point for SP, we return a non-zero value 148 * signalling failure initializing the service. We bail out without 149 * registering any handlers 150 */ 151 if (!optee_ep_info->pc) 152 return 1; 153 154 /* 155 * We could inspect the SP image and determine it's execution 156 * state i.e whether AArch32 or AArch64. Assuming it's AArch32 157 * for the time being. 158 */ 159 opteed_rw = OPTEE_AARCH32; 160 opteed_init_optee_ep_state(optee_ep_info, 161 opteed_rw, 162 optee_ep_info->pc, 163 &opteed_sp_context[linear_id]); 164 165 /* 166 * All OPTEED initialization done. Now register our init function with 167 * BL31 for deferred invocation 168 */ 169 bl31_register_bl32_init(&opteed_init); 170 171 return 0; 172 } 173 174 /******************************************************************************* 175 * This function passes control to the OPTEE image (BL32) for the first time 176 * on the primary cpu after a cold boot. It assumes that a valid secure 177 * context has already been created by opteed_setup() which can be directly 178 * used. It also assumes that a valid non-secure context has been 179 * initialised by PSCI so it does not need to save and restore any 180 * non-secure state. This function performs a synchronous entry into 181 * OPTEE. OPTEE passes control back to this routine through a SMC. 182 ******************************************************************************/ 183 static int32_t opteed_init(void) 184 { 185 uint64_t mpidr = read_mpidr(); 186 uint32_t linear_id = platform_get_core_pos(mpidr); 187 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 188 entry_point_info_t *optee_entry_point; 189 uint64_t rc; 190 191 /* 192 * Get information about the OPTEE (BL32) image. Its 193 * absence is a critical failure. 194 */ 195 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); 196 assert(optee_entry_point); 197 198 cm_init_context(mpidr, optee_entry_point); 199 200 /* 201 * Arrange for an entry into OPTEE. It will be returned via 202 * OPTEE_ENTRY_DONE case 203 */ 204 rc = opteed_synchronous_sp_entry(optee_ctx); 205 assert(rc != 0); 206 207 return rc; 208 } 209 210 211 /******************************************************************************* 212 * This function is responsible for handling all SMCs in the Trusted OS/App 213 * range from the non-secure state as defined in the SMC Calling Convention 214 * Document. It is also responsible for communicating with the Secure 215 * payload to delegate work and return results back to the non-secure 216 * state. Lastly it will also return any information that OPTEE needs to do 217 * the work assigned to it. 218 ******************************************************************************/ 219 uint64_t opteed_smc_handler(uint32_t smc_fid, 220 uint64_t x1, 221 uint64_t x2, 222 uint64_t x3, 223 uint64_t x4, 224 void *cookie, 225 void *handle, 226 uint64_t flags) 227 { 228 cpu_context_t *ns_cpu_context; 229 unsigned long mpidr = read_mpidr(); 230 uint32_t linear_id = platform_get_core_pos(mpidr); 231 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 232 uint64_t rc; 233 234 /* 235 * Determine which security state this SMC originated from 236 */ 237 238 if (is_caller_non_secure(flags)) { 239 /* 240 * This is a fresh request from the non-secure client. 241 * The parameters are in x1 and x2. Figure out which 242 * registers need to be preserved, save the non-secure 243 * state and send the request to the secure payload. 244 */ 245 assert(handle == cm_get_context(NON_SECURE)); 246 247 cm_el1_sysregs_context_save(NON_SECURE); 248 249 /* 250 * We are done stashing the non-secure context. Ask the 251 * OPTEE to do the work now. 252 */ 253 254 /* 255 * Verify if there is a valid context to use, copy the 256 * operation type and parameters to the secure context 257 * and jump to the fast smc entry point in the secure 258 * payload. Entry into S-EL1 will take place upon exit 259 * from this function. 260 */ 261 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 262 263 /* Set appropriate entry for SMC. 264 * We expect OPTEE to manage the PSTATE.I and PSTATE.F 265 * flags as appropriate. 266 */ 267 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) { 268 cm_set_elr_el3(SECURE, (uint64_t) 269 &optee_vectors->fast_smc_entry); 270 } else { 271 cm_set_elr_el3(SECURE, (uint64_t) 272 &optee_vectors->std_smc_entry); 273 } 274 275 cm_el1_sysregs_context_restore(SECURE); 276 cm_set_next_eret_context(SECURE); 277 278 /* Propagate hypervisor client ID */ 279 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 280 CTX_GPREG_X7, 281 read_ctx_reg(get_gpregs_ctx(handle), 282 CTX_GPREG_X7)); 283 284 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3); 285 } 286 287 /* 288 * Returning from OPTEE 289 */ 290 291 switch (smc_fid) { 292 /* 293 * OPTEE has finished initialising itself after a cold boot 294 */ 295 case TEESMC_OPTEED_RETURN_ENTRY_DONE: 296 /* 297 * Stash the OPTEE entry points information. This is done 298 * only once on the primary cpu 299 */ 300 assert(optee_vectors == NULL); 301 optee_vectors = (optee_vectors_t *) x1; 302 303 if (optee_vectors) { 304 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON); 305 306 /* 307 * OPTEE has been successfully initialized. 308 * Register power management hooks with PSCI 309 */ 310 psci_register_spd_pm_hook(&opteed_pm); 311 312 /* 313 * Register an interrupt handler for S-EL1 interrupts 314 * when generated during code executing in the 315 * non-secure state. 316 */ 317 flags = 0; 318 set_interrupt_rm_flag(flags, NON_SECURE); 319 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 320 opteed_sel1_interrupt_handler, 321 flags); 322 if (rc) 323 panic(); 324 } 325 326 /* 327 * OPTEE reports completion. The OPTEED must have initiated 328 * the original request through a synchronous entry into 329 * OPTEE. Jump back to the original C runtime context. 330 */ 331 opteed_synchronous_sp_exit(optee_ctx, x1); 332 333 334 /* 335 * These function IDs is used only by OP-TEE to indicate it has 336 * finished: 337 * 1. turning itself on in response to an earlier psci 338 * cpu_on request 339 * 2. resuming itself after an earlier psci cpu_suspend 340 * request. 341 */ 342 case TEESMC_OPTEED_RETURN_ON_DONE: 343 case TEESMC_OPTEED_RETURN_RESUME_DONE: 344 345 346 /* 347 * These function IDs is used only by the SP to indicate it has 348 * finished: 349 * 1. suspending itself after an earlier psci cpu_suspend 350 * request. 351 * 2. turning itself off in response to an earlier psci 352 * cpu_off request. 353 */ 354 case TEESMC_OPTEED_RETURN_OFF_DONE: 355 case TEESMC_OPTEED_RETURN_SUSPEND_DONE: 356 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE: 357 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE: 358 359 /* 360 * OPTEE reports completion. The OPTEED must have initiated the 361 * original request through a synchronous entry into OPTEE. 362 * Jump back to the original C runtime context, and pass x1 as 363 * return value to the caller 364 */ 365 opteed_synchronous_sp_exit(optee_ctx, x1); 366 367 /* 368 * OPTEE is returning from a call or being preempted from a call, in 369 * either case execution should resume in the normal world. 370 */ 371 case TEESMC_OPTEED_RETURN_CALL_DONE: 372 /* 373 * This is the result from the secure client of an 374 * earlier request. The results are in x0-x3. Copy it 375 * into the non-secure context, save the secure state 376 * and return to the non-secure state. 377 */ 378 assert(handle == cm_get_context(SECURE)); 379 cm_el1_sysregs_context_save(SECURE); 380 381 /* Get a reference to the non-secure context */ 382 ns_cpu_context = cm_get_context(NON_SECURE); 383 assert(ns_cpu_context); 384 385 /* Restore non-secure state */ 386 cm_el1_sysregs_context_restore(NON_SECURE); 387 cm_set_next_eret_context(NON_SECURE); 388 389 SMC_RET4(ns_cpu_context, x1, x2, x3, x4); 390 391 /* 392 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution 393 * should resume in the normal world. 394 */ 395 case TEESMC_OPTEED_RETURN_FIQ_DONE: 396 /* Get a reference to the non-secure context */ 397 ns_cpu_context = cm_get_context(NON_SECURE); 398 assert(ns_cpu_context); 399 400 /* 401 * Restore non-secure state. There is no need to save the 402 * secure system register context since OPTEE was supposed 403 * to preserve it during S-EL1 interrupt handling. 404 */ 405 cm_el1_sysregs_context_restore(NON_SECURE); 406 cm_set_next_eret_context(NON_SECURE); 407 408 SMC_RET0((uint64_t) ns_cpu_context); 409 410 default: 411 panic(); 412 } 413 } 414 415 /* Define an OPTEED runtime service descriptor for fast SMC calls */ 416 DECLARE_RT_SVC( 417 opteed_fast, 418 419 OEN_TOS_START, 420 OEN_TOS_END, 421 SMC_TYPE_FAST, 422 opteed_setup, 423 opteed_smc_handler 424 ); 425 426 /* Define an OPTEED runtime service descriptor for standard SMC calls */ 427 DECLARE_RT_SVC( 428 opteed_std, 429 430 OEN_TOS_START, 431 OEN_TOS_END, 432 SMC_TYPE_STD, 433 NULL, 434 opteed_smc_handler 435 ); 436