1 /* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <assert.h> 9 #include <context.h> 10 #include <context_mgmt.h> 11 #include <debug.h> 12 #include <platform.h> 13 14 /* 15 * Following array will be used for context management. 16 * There are 2 instances, for the Secure and Non-Secure contexts. 17 */ 18 static cpu_context_t bl1_cpu_context[2]; 19 20 /* Following contains the cpu context pointers. */ 21 static void *bl1_cpu_context_ptr[2]; 22 23 24 void *cm_get_context(uint32_t security_state) 25 { 26 assert(sec_state_is_valid(security_state)); 27 return bl1_cpu_context_ptr[security_state]; 28 } 29 30 void cm_set_context(void *context, uint32_t security_state) 31 { 32 assert(sec_state_is_valid(security_state)); 33 bl1_cpu_context_ptr[security_state] = context; 34 } 35 36 /******************************************************************************* 37 * This function prepares the context for Secure/Normal world images. 38 * Normal world images are transitioned to EL2(if supported) else EL1. 39 ******************************************************************************/ 40 void bl1_prepare_next_image(unsigned int image_id) 41 { 42 unsigned int security_state; 43 image_desc_t *image_desc; 44 entry_point_info_t *next_bl_ep; 45 46 #if CTX_INCLUDE_AARCH32_REGS 47 /* 48 * Ensure that the build flag to save AArch32 system registers in CPU 49 * context is not set for AArch64-only platforms. 50 */ 51 if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT) 52 & ID_AA64PFR0_ELX_MASK) == 0x1) { 53 ERROR("EL1 supports AArch64-only. Please set build flag " 54 "CTX_INCLUDE_AARCH32_REGS = 0"); 55 panic(); 56 } 57 #endif 58 59 /* Get the image descriptor. */ 60 image_desc = bl1_plat_get_image_desc(image_id); 61 assert(image_desc); 62 63 /* Get the entry point info. */ 64 next_bl_ep = &image_desc->ep_info; 65 66 /* Get the image security state. */ 67 security_state = GET_SECURITY_STATE(next_bl_ep->h.attr); 68 69 /* Setup the Secure/Non-Secure context if not done already. */ 70 if (!cm_get_context(security_state)) 71 cm_set_context(&bl1_cpu_context[security_state], security_state); 72 73 /* Prepare the SPSR for the next BL image. */ 74 if (security_state == SECURE) { 75 next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 76 DISABLE_ALL_EXCEPTIONS); 77 } else { 78 /* Use EL2 if supported else use EL1. */ 79 if (read_id_aa64pfr0_el1() & 80 (ID_AA64PFR0_ELX_MASK << ID_AA64PFR0_EL2_SHIFT)) { 81 next_bl_ep->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, 82 DISABLE_ALL_EXCEPTIONS); 83 } else { 84 next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 85 DISABLE_ALL_EXCEPTIONS); 86 } 87 } 88 89 /* Allow platform to make change */ 90 bl1_plat_set_ep_info(image_id, next_bl_ep); 91 92 /* Prepare the context for the next BL image. */ 93 cm_init_my_context(next_bl_ep); 94 cm_prepare_el3_exit(security_state); 95 96 /* Indicate that image is in execution state. */ 97 image_desc->state = IMAGE_STATE_EXECUTED; 98 99 print_entry_point_info(next_bl_ep); 100 } 101