xref: /rk3399_ARM-atf/plat/arm/board/fvp/include/plat_macros.S (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1/*
2 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#ifndef __PLAT_MACROS_S__
7#define __PLAT_MACROS_S__
8
9#include <arm_macros.S>
10#include <cci_macros.S>
11#include <v2m_def.h>
12#include "../fvp_def.h"
13
14	/* ---------------------------------------------
15	 * The below required platform porting macro
16	 * prints out relevant GIC and CCI registers
17	 * whenever an unhandled exception is taken in
18	 * BL31.
19	 * Clobbers: x0 - x10, x16, x17, sp
20	 * ---------------------------------------------
21	 */
22	.macro plat_crash_print_regs
23	/*
24	 * Detect if we're using the base memory map or
25	 * the legacy VE memory map
26	 */
27	mov_imm	x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
28	ldr	w16, [x0]
29	/* Extract BLD (12th - 15th bits) from the SYS_ID */
30	ubfx	x16, x16, #V2M_SYS_ID_BLD_SHIFT, #4
31	/* Check if VE mmap */
32	cmp	w16, #BLD_GIC_VE_MMAP
33	b.eq	use_ve_mmap
34	/* Assume Base Cortex mmap */
35	mov_imm	x17, BASE_GICC_BASE
36	mov_imm	x16, BASE_GICD_BASE
37	b	print_gic_regs
38use_ve_mmap:
39	mov_imm	x17, VE_GICC_BASE
40	mov_imm	x16, VE_GICD_BASE
41print_gic_regs:
42	arm_print_gic_regs
43#if FVP_INTERCONNECT_DRIVER == FVP_CCI
44	print_cci_regs
45#endif
46	.endm
47
48#endif /* __PLAT_MACROS_S__ */
49