1 /* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <plat_arm.h> 8 #include "fvp_private.h" 9 10 #if LOAD_IMAGE_V2 11 void bl31_early_platform_setup(void *from_bl2, 12 void *plat_params_from_bl2) 13 #else 14 void bl31_early_platform_setup(bl31_params_t *from_bl2, 15 void *plat_params_from_bl2) 16 #endif 17 { 18 arm_bl31_early_platform_setup(from_bl2, plat_params_from_bl2); 19 20 /* Initialize the platform config for future decision making */ 21 fvp_config_setup(); 22 23 /* 24 * Initialize the correct interconnect for this cluster during cold 25 * boot. No need for locks as no other CPU is active. 26 */ 27 fvp_interconnect_init(); 28 29 /* 30 * Enable coherency in interconnect for the primary CPU's cluster. 31 * Earlier bootloader stages might already do this (e.g. Trusted 32 * Firmware's BL1 does it) but we can't assume so. There is no harm in 33 * executing this code twice anyway. 34 * FVP PSCI code will enable coherency for other clusters. 35 */ 36 fvp_interconnect_enable(); 37 } 38