chore: update to use Arm word across TF-AAlign entire TF-A to use Arm in copyright header.Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244Signed-off-by: Govindraj Raja <govindraj.raja@arm.co
chore: update to use Arm word across TF-AAlign entire TF-A to use Arm in copyright header.Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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Use SPDX license identifiersTo make software license auditing simpler, use SPDX[0] licenseidentifiers instead of duplicating the license text in every file.NOTE: Files that have been imported by
Use SPDX license identifiersTo make software license auditing simpler, use SPDX[0] licenseidentifiers instead of duplicating the license text in every file.NOTE: Files that have been imported by FreeBSD have not been modified.[0]: https://spdx.org/Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761aSigned-off-by: dp-arm <dimitris.papastamos@arm.com>
AArch32: Common changes needed for BL1/BL2This patch adds common changes to support AArch32 state inBL1 and BL2. Following are the changes:* Added functions for disabling MMU from Secure state.
AArch32: Common changes needed for BL1/BL2This patch adds common changes to support AArch32 state inBL1 and BL2. Following are the changes:* Added functions for disabling MMU from Secure state.* Added AArch32 specific SMC function.* Added semihosting support.* Added reporting of unhandled exceptions.* Added uniprocessor stack support.* Added `el3_entrypoint_common` macro that can be shared by BL1 and BL32 (SP_MIN) BL stages. The `el3_entrypoint_common` is similar to the AArch64 counterpart with the main difference in the assembly instructions and the registers that are relevant to AArch32 execution state.* Enabled `LOAD_IMAGE_V2` flag in Makefile for `ARCH=aarch32` and added check to make sure that platform has not overridden to disable it.Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3