| cc974c52 | 22-Feb-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm_service: Support multiple SDIO modes
Existing database allows to set only single mode for SDIO. SDIO can have different groups (8 bit, 4 bit and 1 bit). As there is only single SDIO group
zynqmp: pm_service: Support multiple SDIO modes
Existing database allows to set only single mode for SDIO. SDIO can have different groups (8 bit, 4 bit and 1 bit). As there is only single SDIO group in each pin, it is not possible to use different mode groups for SDIO.
Extend database in generic way to allow multiuple function groups in single pin. Add different SDIO groups to pins and create separate functions for each modes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
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| bd99265b | 30-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Add APIs for pin control queries
Add pin control APIs which driver can use to query pin information from firmware. Using these APIs, driver do not need to maintain hard-coded pin databas
zynqmp: pm: Add APIs for pin control queries
Add pin control APIs which driver can use to query pin information from firmware. Using these APIs, driver do not need to maintain hard-coded pin database.
Major changes in patch are: - Add pin database with pins, functions and function groups information - Implement APIs for pin information queries - Update pin control APIs for get/set functions to use new pin control database. Remove pin database which was added earlier.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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| 1a3f02b5 | 17-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Implement clock APIs
- Add clock entries and information to clock database. - Implement APIs to provide clock topology and other information to caller. - Implement APIs to control cloc
zynqmp: pm: Implement clock APIs
- Add clock entries and information to clock database. - Implement APIs to provide clock topology and other information to caller. - Implement APIs to control clocks and PLLs.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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| 1818c029 | 17-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Implement IOCTL APIs for device control
Implement ioctl APIs which uses MMIO operations to configure devices. Below IOCTLs are supported in this patch: * Set tap delay bypass * Set S
zynqmp: pm: Implement IOCTL APIs for device control
Implement ioctl APIs which uses MMIO operations to configure devices. Below IOCTLs are supported in this patch: * Set tap delay bypass * Set SGMII mode * SD reset * Set SD/MMC tap delay
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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| d0e2c51a | 17-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Implement pin control APIs for configurations
Implement pin control APIs which uses MMIO operations to set/get values of configuration parameters.
Signed-off-by: Rajan Vaja <rajanv@xili
zynqmp: pm: Implement pin control APIs for configurations
Implement pin control APIs which uses MMIO operations to set/get values of configuration parameters.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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| 849ba7f7 | 17-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Add wrappers for Pin control APIs
Add wrappers for pin control APIs. Actual implementation of these APIs would be done in subsequent changes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.co
zynqmp: pm: Add wrappers for Pin control APIs
Add wrappers for pin control APIs. Actual implementation of these APIs would be done in subsequent changes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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| 300cbb0b | 30-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: pm: Add SiP call to obtain PM callback data
The callback IRQ is delivered to the NS OS. Provide an interface to allow the NS OS to obtain the callback data from the secure HW.
Signed-off-by
zynqmp: pm: Add SiP call to obtain PM callback data
The callback IRQ is delivered to the NS OS. Provide an interface to allow the NS OS to obtain the callback data from the secure HW.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| a76c3697 | 30-Sep-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: pm: Enable IPI IRQ when API version is probed
The IPI hardware is secure and managed by ATF, nevertheless we deliver the IRQ to the rich OS. The IRQ is needed to receive PM callbacks. Enable
zynqmp: pm: Enable IPI IRQ when API version is probed
The IPI hardware is secure and managed by ATF, nevertheless we deliver the IRQ to the rich OS. The IRQ is needed to receive PM callbacks. Enable the IPI interrupt when the rich OS probes the API version.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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