plat/css: allow platforms to define the system power domain level

The CSS_SYSTEM_PWR_DMN_LVL macro that defines the system power domain
level is fixed at ARM_PWR_LVL2 for all CSS platforms. However,

plat/css: allow platforms to define the system power domain level

The CSS_SYSTEM_PWR_DMN_LVL macro that defines the system power domain
level is fixed at ARM_PWR_LVL2 for all CSS platforms. However, the
system power domain level can be different for CSS platforms that
use multi-threaded CPUs.

So, in preparation towards adding support for platforms that use
multi-threaded CPUs, refactor the definition of CSS_SYSTEM_PWR_DMN_LVL
such that CSS_SYSTEM_PWR_DMN_LVL is uniquely defined for each of the
CSS platform.

Change-Id: Ia837b13f6865e71da01780993c048b45b7f36d85
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>

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Merge pull request #1697 from antonio-nino-diaz-arm/an/arch

Synchronise arch.h and arch_helpers.h with TF-A-Tests

Synchronise arch.h and arch_helpers.h with TF-A-Tests

The headers forked at some point in the past and have diverged a lot. In
order to make it easier to share code between TF-A-Tests and TF-A, this

Synchronise arch.h and arch_helpers.h with TF-A-Tests

The headers forked at some point in the past and have diverged a lot. In
order to make it easier to share code between TF-A-Tests and TF-A, this
patch synchronises most of the definitions in the mentioned headers.

This is not a complete sync, it has to be followed by more cleanup.

This patch also removes the read helpers for the AArch32 instructions
ats1cpr and ats1hr (they are write-only).

Change-Id: Id13ecd7aeb83bd2318cd47156d71a42f1c9f6ba2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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hikey: remove delay after eMMC initialized

commit 386b14bf64124ebf0368eab33ef07603e0c3138a
Author: Haojian Zhuang <haojian.zhuang@linaro.org>
Date: Wed Nov 21 09:19:49 2018 +0800

mmc: poll eM

hikey: remove delay after eMMC initialized

commit 386b14bf64124ebf0368eab33ef07603e0c3138a
Author: Haojian Zhuang <haojian.zhuang@linaro.org>
Date: Wed Nov 21 09:19:49 2018 +0800

mmc: poll eMMC status after EXT_CSD command

EXT_CSD command needs to access data from eMMC device. Add the
operation of polling eMMC device status. Make sure the command is
finished.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

A hacked delay time can't fit each eMMC device. Since the above commit
enables the polling operation, remove the hacked delay time now.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

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juno: Add romlib support

This patch adds support to build a combined BL1
and ROMLIB binary file with the right page
alignment in Juno. When USE_ROMLIB=1 is set for
Juno, it generates the combined fi

juno: Add romlib support

This patch adds support to build a combined BL1
and ROMLIB binary file with the right page
alignment in Juno. When USE_ROMLIB=1 is set for
Juno, it generates the combined file
bl1_romlib.bin which needs to be used instead of
bl1.bin

Change-Id: I407efbe48d3e522fa6ef855538a9587193cb1919
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

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Merge pull request #1681 from Andre-ARM/allwinner/fixes

allwinner: clock / power fixes

Merge pull request #1691 from vijayenthiran-arm/sgi-dmc620-tzc

Add support for dmc620 tzc driver

Merge pull request #1687 from ldts/rcar_gen3/maintain_4

rcar-gen3: lock RPC hyper-flash access

plat/arm/sgi: add secure memory support for sgi575 and sgiclarka

Remove the platform common plat_arm_security_setup function to allow
platform specific implementations of the security setup function

plat/arm/sgi: add secure memory support for sgi575 and sgiclarka

Remove the platform common plat_arm_security_setup function to allow
platform specific implementations of the security setup function
implemented in the board directory of the platform.

For use by secure software, configure region0 of DMC-620 trustzone
controller to protect the upper 16MB of memory of the first DRAM block
from non-secure accesses.

Change-Id: I9a8c19656702c4fa4f6917b3655b692d443bb568
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

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Merge pull request #1685 from pbatard/rpi3-use-uefi-map

rpi3: add RPI3_USE_UEFI_MAP build option

rcar-gen3: control RPC hyper-flash access

RCAR_RPC_HYPERFLASH_LOCKED can be set to 0 as a build option if the
user needs to allow u-boot to reprogram the ATF firmware using a FIP
image (as a faster

rcar-gen3: control RPC hyper-flash access

RCAR_RPC_HYPERFLASH_LOCKED can be set to 0 as a build option if the
user needs to allow u-boot to reprogram the ATF firmware using a FIP
image (as a faster alternative of toggling numerous DIP switches on
the board and using ascii-xfer of srec files)

The code being controlled with this commit should only be re-enabled for
debugging (_never_ on a product release)

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>

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Merge pull request #1684 from oscardagrach/hikey-mmc-fix

hikey: increase delay after eMMC initialized

Merge pull request #1682 from MISL-EBU-System-SW/migrate-multi-console

Marvell: Migrate to multi console API

rpi3: add RPI3_USE_UEFI_MAP build option

The default Raspberry Pi 3 memory mapping for ATF is geared towards
the use of uboot + Linux. This creates issues when trying to use
ATF with an UEFI payload

rpi3: add RPI3_USE_UEFI_MAP build option

The default Raspberry Pi 3 memory mapping for ATF is geared towards
the use of uboot + Linux. This creates issues when trying to use
ATF with an UEFI payload and Windows on ARM64.

We therefore introduce new build option RPI3_USE_UEFI_MAP, that
enables the build process to use an alternate memory mapping that
is compatible with UEFI + Windows (as well as UEFI + Linux).

Fixes ARM-software/tf-issues#649

Signed-off-by: Pete Batard <pete@akeo.ie>

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Merge pull request #1683 from Yann-lms/stm32mp1_multi_console

Add multi console support for STM32MP1

Merge pull request #1680 from pbatard/rpi3-runtime-uart

rpi3: add RPI3_RUNTIME_UART build option

hikey: increase delay after eMMC initialized

Some eMMC chips require a longer delay. After testing
different chips, 20ms appears to work reliably.

Signed-off-by: Ryan Grachek <ryan@edited.us>

plat/marvell: Migrate to multi-console API

Migrate Marvell platforms from legacy console API to
multi-console API.

Change-Id: I647f5f49148b463a257a747af05b5f0c967f267c
Signed-off-by: Konstantin Por

plat/marvell: Migrate to multi-console API

Migrate Marvell platforms from legacy console API to
multi-console API.

Change-Id: I647f5f49148b463a257a747af05b5f0c967f267c
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

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stm32mp1: use MULTI_CONSOLE_API

Signed-off-by: Yann Gautier <yann.gautier@st.com>

fix: plat/marvell: a3700: Remove encryption password

According to "openssl" manual:
-K key
The actual key to use: this must be represented as a string
comprised only of hex digits. If only the key i

fix: plat/marvell: a3700: Remove encryption password

According to "openssl" manual:
-K key
The actual key to use: this must be represented as a string
comprised only of hex digits. If only the key is specified,
the IV must additionally specified using the -iv option.
When both a key and a password are specified, the key given
with the -K option will be used and the IV generated from the
password will be taken.
It does not make much sense to specify both key and password.

This patch removes "-k 0" parameter from the encryption command
since we are already using "-K" and "-iv" for the key and IV.

Change-Id: Ia333cedaa3207e643c95d2ec7c229f50eeab96db
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/60745
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Sharon Habet <sharonh@marvell.com>

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allwinner: power: Add DCDC6 power rail

The DCDC6 power rail is typically driving VDD_SYS in the SoC, so it is
on by default and uses the default voltage.

As there seems to be at least on board usin

allwinner: power: Add DCDC6 power rail

The DCDC6 power rail is typically driving VDD_SYS in the SoC, so it is
on by default and uses the default voltage.

As there seems to be at least on board using a different voltage, add
the rail to the list of known voltage lines, so we can setup the right
voltage as early as possible.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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allwinner: power: add enable switches for DCDC1/5

The DCDC1 and DCDC5 power rails didn't specify the enable bits. This
isn't critical, since those rails are on by default (and are needed for
every b

allwinner: power: add enable switches for DCDC1/5

The DCDC1 and DCDC5 power rails didn't specify the enable bits. This
isn't critical, since those rails are on by default (and are needed for
every board), but it is inconsistent.

Add the respective enable bits for those two rails.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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allwinner: power: fix DRIVEVBUS pin setup

The DRIVEVBUS pin setup was broken in two ways:
- To configure this pin as an output pin, one has to *clear* the bit in
register 0x8f. It is 0 by default,

allwinner: power: fix DRIVEVBUS pin setup

The DRIVEVBUS pin setup was broken in two ways:
- To configure this pin as an output pin, one has to *clear* the bit in
register 0x8f. It is 0 by default, but rebooting from Linux might have
left this bit set.
- Doing this just configures the pin as an output pin, but doesn't
actually drive power to it. This is done via bit 2 in register 0x30.

Fix the routine to both properly configure the pin and drive power to
it. Add an axp_clrsetbits() helper on the way.

Now this isn't really perfect, still:
We only need to setup the PMIC power rails that are needed for U-Boot.
DRIVEVBUS typically controls the VBUS voltage for the host function of
an USB-OTG port, something we typically don't want in U-Boot (fastboot,
using the USB *device* functionality, is much more common). The
BananaPi-M64 uses the regulator in this way, but the Remix Mini PC
actually controls the power of both its USB ports via this line.

Technically we should differentiate here: if DRIVEVBUS controls a
microUSB-B socket, the power should stay off, any host-type A sockets
should be supplied, though.
For now just always enable the power, that shouldn't really hurt the
USB-OTG functionality anyway.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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allwinner: A64/H5: setup missing bus clocks

The legacy Allwinner ATF port used to setup some clocks, and U-Boot is
still relying on this. We don't need to setup the full set, as the SPL
is doing mos

allwinner: A64/H5: setup missing bus clocks

The legacy Allwinner ATF port used to setup some clocks, and U-Boot is
still relying on this. We don't need to setup the full set, as the SPL
is doing most of it, but it misses one clock (AHB2) and programs another
(AHB1) to quite conservative values.

Fix this up during the platform setup to improve USB and Ethernet
performance, iperf values go up by 31% in my setup with that patch.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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SPM: Register Secure Partition priority level with ehf module

Register a priority level, PLAT_SP_PRI, for secure partition with EL3
exception handling framework(ehf) module.

The secure partition ma

SPM: Register Secure Partition priority level with ehf module

Register a priority level, PLAT_SP_PRI, for secure partition with EL3
exception handling framework(ehf) module.

The secure partition manager(SPM) would raise the core's priority to
PLAT_SP_PRI before entering the secure partition, to protect the core
from getting interrupted while in secure partition.

Change-Id: I686897f052a4371e0efa9b929c07d3ad77249e95
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>

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