1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef TEGRA_PRIVATE_H 8 #define TEGRA_PRIVATE_H 9 10 #include <arch.h> 11 #include <arch_helpers.h> 12 #include <platform_def.h> 13 #include <psci.h> 14 #include <tegra_gic.h> 15 #include <xlat_tables_v2.h> 16 17 /******************************************************************************* 18 * Tegra DRAM memory base address 19 ******************************************************************************/ 20 #define TEGRA_DRAM_BASE ULL(0x80000000) 21 #define TEGRA_DRAM_END ULL(0x27FFFFFFF) 22 23 /******************************************************************************* 24 * Struct for parameters received from BL2 25 ******************************************************************************/ 26 typedef struct plat_params_from_bl2 { 27 /* TZ memory size */ 28 uint64_t tzdram_size; 29 /* TZ memory base */ 30 uint64_t tzdram_base; 31 /* UART port ID */ 32 int uart_id; 33 } plat_params_from_bl2_t; 34 35 /******************************************************************************* 36 * Struct describing parameters passed to bl31 37 ******************************************************************************/ 38 struct tegra_bl31_params { 39 param_header_t h; 40 image_info_t *bl31_image_info; 41 entry_point_info_t *bl32_ep_info; 42 image_info_t *bl32_image_info; 43 entry_point_info_t *bl33_ep_info; 44 image_info_t *bl33_image_info; 45 }; 46 47 /* Declarations for plat_psci_handlers.c */ 48 int32_t tegra_soc_validate_power_state(unsigned int power_state, 49 psci_power_state_t *req_state); 50 51 /* Declarations for plat_setup.c */ 52 const mmap_region_t *plat_get_mmio_map(void); 53 uint32_t plat_get_console_from_id(int id); 54 void plat_gic_setup(void); 55 struct tegra_bl31_params *plat_get_bl31_params(void); 56 plat_params_from_bl2_t *plat_get_bl31_plat_params(void); 57 58 /* Declarations for plat_secondary.c */ 59 void plat_secondary_setup(void); 60 int plat_lock_cpu_vectors(void); 61 62 /* Declarations for tegra_fiq_glue.c */ 63 void tegra_fiq_handler_setup(void); 64 int tegra_fiq_get_intr_context(void); 65 void tegra_fiq_set_ns_entrypoint(uint64_t entrypoint); 66 67 /* Declarations for tegra_security.c */ 68 void tegra_security_setup(void); 69 void tegra_security_setup_videomem(uintptr_t base, uint64_t size); 70 71 /* Declarations for tegra_pm.c */ 72 extern uint8_t tegra_fake_system_suspend; 73 74 void tegra_pm_system_suspend_entry(void); 75 void tegra_pm_system_suspend_exit(void); 76 int tegra_system_suspended(void); 77 78 /* Declarations for tegraXXX_pm.c */ 79 int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl); 80 int tegra_prepare_cpu_on_finish(unsigned long mpidr); 81 82 /* Declarations for tegra_bl31_setup.c */ 83 plat_params_from_bl2_t *bl31_get_plat_params(void); 84 int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes); 85 void plat_early_platform_setup(void); 86 87 /* Declarations for tegra_delay_timer.c */ 88 void tegra_delay_timer_init(void); 89 90 void tegra_secure_entrypoint(void); 91 void tegra186_cpu_reset_handler(void); 92 93 #endif /* TEGRA_PRIVATE_H */ 94