feat(smccc): add vendor-specific el3 service

Add support for vendor-specific el3 service. SMCCC 1.5 introduces
support for vendor-specific EL3 monitor calls.

SMCCC Documentation reference:
https://

feat(smccc): add vendor-specific el3 service

Add support for vendor-specific el3 service. SMCCC 1.5 introduces
support for vendor-specific EL3 monitor calls.

SMCCC Documentation reference:
https://developer.arm.com/docs/den0028/latest

Change-Id: Id8bc43842eecdb7a8a2ec7f31a631e88fe4fe0b4
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

build: remove `MAKE_BUILD_STRINGS` function

This function causes the build message to be generated and compiled in
two different ways, with one way done inside `build_macros.mk` and the
other done i

build: remove `MAKE_BUILD_STRINGS` function

This function causes the build message to be generated and compiled in
two different ways, with one way done inside `build_macros.mk` and the
other done inside `windows.mk`, mostly because it's done by generating
the C file on the command line.

We can instead replace this whole build message generation sequence with
a simple standard C compilation command and a normal C file.

Change-Id: I8bc136380c9585ddeec9a11154ee39ef70526f81
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

feat(console): introduce EARLY_CONSOLE

This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(

feat(console): introduce EARLY_CONSOLE

This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(). This function depends on platform
implementation. This function call is added at the beginning of each BL
image early setup function.
The patch also introduce an extra log macro: EARLY_ERROR. This can
replace ERROR macro in code that will only be executed before the
default console is enabled, and will do nothing when the EARLY_CONSOLE
is not enabled. This can then save some space in memory.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I77bf0a0c4289b4c7df94e4bfb783a938e05bf023

show more ...

feat(bl32): create an sp_min_setup function

This new C function will call sp_min_early_platform_setup2() and
sp_min_plat_arch_setup(). At this step the C environment is already
enabled, and it allow

feat(bl32): create an sp_min_setup function

This new C function will call sp_min_early_platform_setup2() and
sp_min_plat_arch_setup(). At this step the C environment is already
enabled, and it allows adding function like the one for early console
for which r9-r12 registers could be clobbered.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4cbf2f6acea769d595ff40b2e2b4ca5d29672878

show more ...

refactor(mte): remove mte, mte_perm

Currently both FEAT_MTE and FEAT_MTE_PERM aren't used for enabling
of any feature bits in EL3. So remove both FEAT handling.

All mte regs that are currently cont

refactor(mte): remove mte, mte_perm

Currently both FEAT_MTE and FEAT_MTE_PERM aren't used for enabling
of any feature bits in EL3. So remove both FEAT handling.

All mte regs that are currently context saved/restored are needed
only when FEAT_MTE2 is enabled, so move to usage of FEAT_MTE2 and
remove FEAT_MTE usage.

BREAKING CHANGE: Any platform or downstream code trying to use
SCR_EL3.ATA bit(26) will see failures as this is now moved to be
used only with FEAT_MTE2 with
commit@ef0d0e5478a3f19cbe70a378b9b184036db38fe2

Change-Id: Id01e154156571f7792135639e17dc5c8d0e17cf8
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

Merge "build: use toolchain identifiers in conditions" into integration

Merge "build: use new toolchain variables for tools" into integration

feat(mte): add mte2 feat

Add support for feat mte2. tfsr_el2 is available only with mte2,
however currently its context_save/restore is done with mte rather than
mte2, so introduce 'is_feat_mte2_sup

feat(mte): add mte2 feat

Add support for feat mte2. tfsr_el2 is available only with mte2,
however currently its context_save/restore is done with mte rather than
mte2, so introduce 'is_feat_mte2_supported' to check mte2.

Change-Id: I108d9989a8f5b4d1d2f3b9865a914056fa566cf2
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

build: use toolchain identifiers in conditions

The toolchain refactor change introduces the `${toolchain}-${tool}-id`
variables, which provide identifiers for all of the toolchain tools used
by the

build: use toolchain identifiers in conditions

The toolchain refactor change introduces the `${toolchain}-${tool}-id`
variables, which provide identifiers for all of the toolchain tools used
by the build system. This change replaces the various conditions that
are in use to identify these tools based on the path with a standard set
of comparisons against these new identifier variables.

Change-Id: Ib60e592359fa6e415c19a012e68d660f87436ca7
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

build: use new toolchain variables for tools

This change migrates the values of `CC`, `CPP`, `AS` and other toolchain
variables to the new `$(toolchain)-$(tool)` variables, which were
introduced by

build: use new toolchain variables for tools

This change migrates the values of `CC`, `CPP`, `AS` and other toolchain
variables to the new `$(toolchain)-$(tool)` variables, which were
introduced by the toolchain refactor patch. These variables should be
equivalent to the values that they're replacing.

Change-Id: I644fe4ce82ef1894bed129ddb4b6ab94fb04985d
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

refactor(mte): deprecate CTX_INCLUDE_MTE_REGS

Currently CTX_INCLUDE_MTE_REGS is used for dual purpose,
to enable allocation tags register and to context save and restore
them and also to check if mt

refactor(mte): deprecate CTX_INCLUDE_MTE_REGS

Currently CTX_INCLUDE_MTE_REGS is used for dual purpose,
to enable allocation tags register and to context save and restore
them and also to check if mte feature is available.

To make it more meaningful, remove CTX_INCLUDE_MTE_REGS
and introduce FEAT_MTE. This would enable allocation tags register
when FEAT_MTE is enabled and also supported from platform.

Also arch features can be conditionally enabled disabled based on
arch version from `make_helpers/arch_features.mk`

Change-Id: Ibdd2d43874634ad7ddff93c7edad6044ae1631ed
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

feat(build): check that .text section starts at page boundary

Linker may decide to put new unspecified sections before .text
section. That will cause non-working image, because entry point isn't
at

feat(build): check that .text section starts at page boundary

Linker may decide to put new unspecified sections before .text
section. That will cause non-working image, because entry point isn't
at __BLXX_START__. Device just not booted with such image.

This happened for example with .note.gnu.build-id section generated
for LTO build in some cases. Now linker will report this situation as
an error.

```
/usr/lib/gcc-cross/aarch64-linux-gnu/13/../../../../aarch64-linux-gnu/bin/ld: .text is not aligned on a page boundary.
collect2: error: ld returned 1 exit status
```

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Change-Id: I5ae46ddd1e6e431e1df1715d1d301f6dd7181cc7

show more ...

feat(bl32): print entry point before exiting SP_MIN

BL31 prints information about the entry point in the normal world
before exiting, but for some reason SP_MIN does not do that. Add the
missing cal

feat(bl32): print entry point before exiting SP_MIN

BL31 prints information about the entry point in the normal world
before exiting, but for some reason SP_MIN does not do that. Add the
missing call to print_entry_point_info() for more consistency.

Change-Id: I2f4961fec57fcc9955cd15652d4ceba3bbb32375
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

show more ...

fix(bl32): avoid clearing argument registers in RESET_TO_SP_MIN case

RESET_TO_SP_MIN is also used by platforms with a non TF-A bootloader,
in which case there might be platform-specific arguments pa

fix(bl32): avoid clearing argument registers in RESET_TO_SP_MIN case

RESET_TO_SP_MIN is also used by platforms with a non TF-A bootloader,
in which case there might be platform-specific arguments passed in the
CPU registers. At the moment these are cleared and cannot be used by
the platform layer.

For BL31 this was recently changed in "fix(bl31): avoid clearing of
argument registers in RESET_TO_BL31 case", but on AArch32 SP_MIN still
has the old behavior.

Make this consistent by preserving the registers in SP_MIN as well
and use the chance to clarify the existing comments a bit.

Change-Id: I0039c72477249eed76c3da23cb4f10ac59b310d0
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

show more ...

fix(bl32): always include arm_arch_svc in SP_MIN

The PSCI_FEATURES call implementation in TF-A always indicates support
for SMCCC_VERSION, but only BL31 ensures that the corresponding Arm
Architectu

fix(bl32): always include arm_arch_svc in SP_MIN

The PSCI_FEATURES call implementation in TF-A always indicates support
for SMCCC_VERSION, but only BL31 ensures that the corresponding Arm
Architecture Service (arm_arch_svc) is really included in the build.
For SP_MIN only stm32mp1 currently includes it in the platform-specific
make file.

This means that it is easily possible to build configurations that
violate the PSCI/SMCCC specification. On Linux this leads to incorrect
detection of the SMC Calling Convention when using SP_MIN:

[ 0.000000] psci: SMC Calling Convention v65535.65535

Fix this by always including the Arm Architecture Service in SP_MIN
builds. This allows Linux to detect the convention correctly:

[ 0.000000] psci: SMC Calling Convention v1.4

Change-Id: Iaa3076c162b7a55633ec1e27eb5c44d22f8eb2a1
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

show more ...

refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init

The FEAT_MTPMU feature disable runs very early after reset. This means,
it needs to be written in assembly, since the C ru

refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init

The FEAT_MTPMU feature disable runs very early after reset. This means,
it needs to be written in assembly, since the C runtime has not been
initialised yet.

However, there is no need for it to be initialised so soon. The PMU
state is only relevant after TF-A has relinquished control. The code
to do this is also very verbose and difficult to read. Delaying the
initialisation allows for it to happen with the rest of the PMU. Align
with FEAT_STATE in the process.

BREAKING CHANGE: This patch explicitly breaks the EL2 entry path. It is
currently unsupported.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I2aa659d026fbdb75152469f6d19812ece3488c6f

show more ...

fix(tsp): fix destination ID in direct request

Ensure the TSP ID is set as the source ID in a direct request.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ia082fe5a1da6f2994072ec70

fix(tsp): fix destination ID in direct request

Ensure the TSP ID is set as the source ID in a direct request.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ia082fe5a1da6f2994072ec70c6ba818212a52f20

show more ...

chore(bl): add UNALIGNED symbols for TEXT/RODATA

Add symbols to mark end of TEXT/RODATA before page alignment.
Similar change was done by commit 8d69a03f6a7d ("Various
improvements/cleanups on the l

chore(bl): add UNALIGNED symbols for TEXT/RODATA

Add symbols to mark end of TEXT/RODATA before page alignment.
Similar change was done by commit 8d69a03f6a7d ("Various
improvements/cleanups on the linker scripts") for
RO_END/COHERENT_RAM. These symbols help to know how much free
space is in the final binary because of page alignment.

Also show all *UNALIGNED__ symbols via poetry.
For example:
poetry run memory -p zynqmp -b debug

Change-Id: I322beba37dad76be9f4e88ca7e5b3eff2df7d96e
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

Merge changes from topic "hm/memmap-feat" into integration

* changes:
build(bl32): add symbols for memory layout
build(bl31): add symbols for memory layout
build(bl2): add symbols for memory l

Merge changes from topic "hm/memmap-feat" into integration

* changes:
build(bl32): add symbols for memory layout
build(bl31): add symbols for memory layout
build(bl2): add symbols for memory layout
build(bl1): add symbols for memory layout
refactor: improve readability of symbol table

show more ...

fix(tsp): flush uart console

tsp uses uart2 and is printing some init messages in main, but
in certain situations we may exit tsp and may not have flushed
uart data, this could later land in uart fi

fix(tsp): flush uart console

tsp uses uart2 and is printing some init messages in main, but
in certain situations we may exit tsp and may not have flushed
uart data, this could later land in uart fifo overflow or
random corruption.

Time to time we have seen a character corruption on uart2 arising
out of logs from tsp main.

So flush console messages from tsp_main before leaving the function.
This is inline with our uart usage strategy across TF-A as most
entry _main function ensures uart console is flushed before exit.

The console flush is harmless and should fix the potential character
corruption if it was due to tsp_main negligence.

But we cannot also rule out that it could be a potential FVP-UART
problem, but that's quite unlikely and further CI daily's will give
us a idea if this fixes the character corruption seen or we may need
stress test FVP-UART which maybe corrupting character in certain
circumstances.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I300c6b71c00fa92b8b97b3e77ea936b393d0f7b5

show more ...

build(bl32): add symbols for memory layout

Add symbols for mapping the physical memory layout of BL32. There are
symbols that partially satisfy this requirement, however, the naming of
these is inco

build(bl32): add symbols for memory layout

Add symbols for mapping the physical memory layout of BL32. There are
symbols that partially satisfy this requirement, however, the naming of
these is inconsistent.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I106187f93b227d604bda650892f9e919047b3fc7

show more ...

feat(errata_abi): errata management firmware interface

This patch adds the errata management firmware interface for lower ELs
to discover details about CPU erratum. Based on the CPU erratum
identifi

feat(errata_abi): errata management firmware interface

This patch adds the errata management firmware interface for lower ELs
to discover details about CPU erratum. Based on the CPU erratum
identifier the interface enables the OS to find the mitigation of an
erratum in EL3.

The ABI can only be present in a system that is compliant with SMCCCv1.1
or higher. This implements v1.0 of the errata ABI spec.

For details on all possible return values, refer the design
documentation below:

ABI design documentation:
https://developer.arm.com/documentation/den0100/1-0?lang=en

Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
Change-Id: I70f0e2569cf92e6e02ad82e3e77874546232b89a

show more ...

Merge changes from topic "align-sections" into integration

* changes:
build(trp): sort sections by alignment by default
build(tsp): sort sections by alignment by default
build(sp-min): sort se

Merge changes from topic "align-sections" into integration

* changes:
build(trp): sort sections by alignment by default
build(tsp): sort sections by alignment by default
build(sp-min): sort sections by alignment by default
build(bl31): sort sections by alignment by default
build(bl2u): sort sections by alignment by default
build(bl2): sort sections by alignment by default

show more ...

refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED

At the moment we only support FEAT_DIT to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime det

refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED

At the moment we only support FEAT_DIT to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime detection (ENABLE_DIT=2), by splitting
is_armv8_4_dit_present() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed).

We use ENABLE_DIT in two occassions in assembly code, where we just set
the DIT bit in the DIT system register.
Protect those two cases by reading the CPU ID register when ENABLE_DIT
is set to 2.

Change the FVP platform default to the now supported dynamic
option (=2), so the right decision can be made by the code at runtime.

Change-Id: I506d352f18e23c60db8cdf08edb449f60adbe098
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...