1 /* 2 * Copyright (c) 2021-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch_features.h> 15 #include <bl31/bl31.h> 16 #include <common/debug.h> 17 #include <common/runtime_svc.h> 18 #include <context.h> 19 #include <lib/el3_runtime/context_mgmt.h> 20 #include <lib/el3_runtime/pubsub.h> 21 #include <lib/extensions/pmuv3.h> 22 #include <lib/extensions/sys_reg_trace.h> 23 #include <lib/gpt_rme/gpt_rme.h> 24 25 #include <lib/spinlock.h> 26 #include <lib/utils.h> 27 #include <lib/xlat_tables/xlat_tables_v2.h> 28 #include <plat/common/common_def.h> 29 #include <plat/common/platform.h> 30 #include <platform_def.h> 31 #include <services/rmmd_svc.h> 32 #include <smccc_helpers.h> 33 #include <lib/extensions/sve.h> 34 #include "rmmd_initial_context.h" 35 #include "rmmd_private.h" 36 37 /******************************************************************************* 38 * RMM boot failure flag 39 ******************************************************************************/ 40 static bool rmm_boot_failed; 41 42 /******************************************************************************* 43 * RMM context information. 44 ******************************************************************************/ 45 rmmd_rmm_context_t rmm_context[PLATFORM_CORE_COUNT]; 46 47 /******************************************************************************* 48 * RMM entry point information. Discovered on the primary core and reused 49 * on secondary cores. 50 ******************************************************************************/ 51 static entry_point_info_t *rmm_ep_info; 52 53 /******************************************************************************* 54 * Static function declaration. 55 ******************************************************************************/ 56 static int32_t rmm_init(void); 57 58 /******************************************************************************* 59 * This function takes an RMM context pointer and performs a synchronous entry 60 * into it. 61 ******************************************************************************/ 62 uint64_t rmmd_rmm_sync_entry(rmmd_rmm_context_t *rmm_ctx) 63 { 64 uint64_t rc; 65 66 assert(rmm_ctx != NULL); 67 68 cm_set_context(&(rmm_ctx->cpu_ctx), REALM); 69 70 /* Restore the realm context assigned above */ 71 cm_el1_sysregs_context_restore(REALM); 72 cm_el2_sysregs_context_restore(REALM); 73 cm_set_next_eret_context(REALM); 74 75 /* Enter RMM */ 76 rc = rmmd_rmm_enter(&rmm_ctx->c_rt_ctx); 77 78 /* 79 * Save realm context. EL1 and EL2 Non-secure 80 * contexts will be restored before exiting to 81 * Non-secure world, therefore there is no need 82 * to clear EL1 and EL2 context registers. 83 */ 84 cm_el1_sysregs_context_save(REALM); 85 cm_el2_sysregs_context_save(REALM); 86 87 return rc; 88 } 89 90 /******************************************************************************* 91 * This function returns to the place where rmmd_rmm_sync_entry() was 92 * called originally. 93 ******************************************************************************/ 94 __dead2 void rmmd_rmm_sync_exit(uint64_t rc) 95 { 96 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 97 98 /* Get context of the RMM in use by this CPU. */ 99 assert(cm_get_context(REALM) == &(ctx->cpu_ctx)); 100 101 /* 102 * The RMMD must have initiated the original request through a 103 * synchronous entry into RMM. Jump back to the original C runtime 104 * context with the value of rc in x0; 105 */ 106 rmmd_rmm_exit(ctx->c_rt_ctx, rc); 107 108 panic(); 109 } 110 111 static void rmm_el2_context_init(el2_sysregs_t *regs) 112 { 113 regs->ctx_regs[CTX_SPSR_EL2 >> 3] = REALM_SPSR_EL2; 114 regs->ctx_regs[CTX_SCTLR_EL2 >> 3] = SCTLR_EL2_RES1; 115 } 116 117 /******************************************************************************* 118 * Enable architecture extensions on first entry to Realm world. 119 ******************************************************************************/ 120 static void manage_extensions_realm(cpu_context_t *ctx) 121 { 122 if (is_feat_sve_supported()) { 123 /* 124 * Enable SVE and FPU in realm context when it is enabled for NS. 125 * Realm manager must ensure that the SVE and FPU register 126 * contexts are properly managed. 127 */ 128 sve_enable(ctx); 129 } 130 131 pmuv3_enable(ctx); 132 } 133 134 /******************************************************************************* 135 * Jump to the RMM for the first time. 136 ******************************************************************************/ 137 static int32_t rmm_init(void) 138 { 139 long rc; 140 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 141 142 INFO("RMM init start.\n"); 143 144 /* Enable architecture extensions */ 145 manage_extensions_realm(&ctx->cpu_ctx); 146 147 /* Initialize RMM EL2 context. */ 148 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 149 150 rc = rmmd_rmm_sync_entry(ctx); 151 if (rc != E_RMM_BOOT_SUCCESS) { 152 ERROR("RMM init failed: %ld\n", rc); 153 /* Mark the boot as failed for all the CPUs */ 154 rmm_boot_failed = true; 155 return 0; 156 } 157 158 INFO("RMM init end.\n"); 159 160 return 1; 161 } 162 163 /******************************************************************************* 164 * Load and read RMM manifest, setup RMM. 165 ******************************************************************************/ 166 int rmmd_setup(void) 167 { 168 size_t shared_buf_size __unused; 169 uintptr_t shared_buf_base; 170 uint32_t ep_attr; 171 unsigned int linear_id = plat_my_core_pos(); 172 rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id]; 173 struct rmm_manifest *manifest; 174 int rc; 175 176 /* Make sure RME is supported. */ 177 assert(get_armv9_2_feat_rme_support() != 0U); 178 179 rmm_ep_info = bl31_plat_get_next_image_ep_info(REALM); 180 if (rmm_ep_info == NULL) { 181 WARN("No RMM image provided by BL2 boot loader, Booting " 182 "device without RMM initialization. SMCs destined for " 183 "RMM will return SMC_UNK\n"); 184 return -ENOENT; 185 } 186 187 /* Under no circumstances will this parameter be 0 */ 188 assert(rmm_ep_info->pc == RMM_BASE); 189 190 /* Initialise an entrypoint to set up the CPU context */ 191 ep_attr = EP_REALM; 192 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) { 193 ep_attr |= EP_EE_BIG; 194 } 195 196 SET_PARAM_HEAD(rmm_ep_info, PARAM_EP, VERSION_1, ep_attr); 197 rmm_ep_info->spsr = SPSR_64(MODE_EL2, 198 MODE_SP_ELX, 199 DISABLE_ALL_EXCEPTIONS); 200 201 shared_buf_size = 202 plat_rmmd_get_el3_rmm_shared_mem(&shared_buf_base); 203 204 assert((shared_buf_size == SZ_4K) && 205 ((void *)shared_buf_base != NULL)); 206 207 /* Load the boot manifest at the beginning of the shared area */ 208 manifest = (struct rmm_manifest *)shared_buf_base; 209 rc = plat_rmmd_load_manifest(manifest); 210 if (rc != 0) { 211 ERROR("Error loading RMM Boot Manifest (%i)\n", rc); 212 return rc; 213 } 214 flush_dcache_range((uintptr_t)shared_buf_base, shared_buf_size); 215 216 /* 217 * Prepare coldboot arguments for RMM: 218 * arg0: This CPUID (primary processor). 219 * arg1: Version for this Boot Interface. 220 * arg2: PLATFORM_CORE_COUNT. 221 * arg3: Base address for the EL3 <-> RMM shared area. The boot 222 * manifest will be stored at the beginning of this area. 223 */ 224 rmm_ep_info->args.arg0 = linear_id; 225 rmm_ep_info->args.arg1 = RMM_EL3_INTERFACE_VERSION; 226 rmm_ep_info->args.arg2 = PLATFORM_CORE_COUNT; 227 rmm_ep_info->args.arg3 = shared_buf_base; 228 229 /* Initialise RMM context with this entry point information */ 230 cm_setup_context(&rmm_ctx->cpu_ctx, rmm_ep_info); 231 232 INFO("RMM setup done.\n"); 233 234 /* Register init function for deferred init. */ 235 bl31_register_rmm_init(&rmm_init); 236 237 return 0; 238 } 239 240 /******************************************************************************* 241 * Forward SMC to the other security state 242 ******************************************************************************/ 243 static uint64_t rmmd_smc_forward(uint32_t src_sec_state, 244 uint32_t dst_sec_state, uint64_t x0, 245 uint64_t x1, uint64_t x2, uint64_t x3, 246 uint64_t x4, void *handle) 247 { 248 cpu_context_t *ctx = cm_get_context(dst_sec_state); 249 250 /* Save incoming security state */ 251 cm_el1_sysregs_context_save(src_sec_state); 252 cm_el2_sysregs_context_save(src_sec_state); 253 254 /* Restore outgoing security state */ 255 cm_el1_sysregs_context_restore(dst_sec_state); 256 cm_el2_sysregs_context_restore(dst_sec_state); 257 cm_set_next_eret_context(dst_sec_state); 258 259 /* 260 * As per SMCCCv1.2, we need to preserve x4 to x7 unless 261 * being used as return args. Hence we differentiate the 262 * onward and backward path. Support upto 8 args in the 263 * onward path and 4 args in return path. 264 * Register x4 will be preserved by RMM in case it is not 265 * used in return path. 266 */ 267 if (src_sec_state == NON_SECURE) { 268 SMC_RET8(ctx, x0, x1, x2, x3, x4, 269 SMC_GET_GP(handle, CTX_GPREG_X5), 270 SMC_GET_GP(handle, CTX_GPREG_X6), 271 SMC_GET_GP(handle, CTX_GPREG_X7)); 272 } 273 274 SMC_RET5(ctx, x0, x1, x2, x3, x4); 275 } 276 277 /******************************************************************************* 278 * This function handles all SMCs in the range reserved for RMI. Each call is 279 * either forwarded to the other security state or handled by the RMM dispatcher 280 ******************************************************************************/ 281 uint64_t rmmd_rmi_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 282 uint64_t x3, uint64_t x4, void *cookie, 283 void *handle, uint64_t flags) 284 { 285 uint32_t src_sec_state; 286 287 /* If RMM failed to boot, treat any RMI SMC as unknown */ 288 if (rmm_boot_failed) { 289 WARN("RMMD: Failed to boot up RMM. Ignoring RMI call\n"); 290 SMC_RET1(handle, SMC_UNK); 291 } 292 293 /* Determine which security state this SMC originated from */ 294 src_sec_state = caller_sec_state(flags); 295 296 /* RMI must not be invoked by the Secure world */ 297 if (src_sec_state == SMC_FROM_SECURE) { 298 WARN("RMMD: RMI invoked by secure world.\n"); 299 SMC_RET1(handle, SMC_UNK); 300 } 301 302 /* 303 * Forward an RMI call from the Normal world to the Realm world as it 304 * is. 305 */ 306 if (src_sec_state == SMC_FROM_NON_SECURE) { 307 VERBOSE("RMMD: RMI call from non-secure world.\n"); 308 return rmmd_smc_forward(NON_SECURE, REALM, smc_fid, 309 x1, x2, x3, x4, handle); 310 } 311 312 if (src_sec_state != SMC_FROM_REALM) { 313 SMC_RET1(handle, SMC_UNK); 314 } 315 316 switch (smc_fid) { 317 case RMM_RMI_REQ_COMPLETE: { 318 uint64_t x5 = SMC_GET_GP(handle, CTX_GPREG_X5); 319 320 return rmmd_smc_forward(REALM, NON_SECURE, x1, 321 x2, x3, x4, x5, handle); 322 } 323 default: 324 WARN("RMMD: Unsupported RMM call 0x%08x\n", smc_fid); 325 SMC_RET1(handle, SMC_UNK); 326 } 327 } 328 329 /******************************************************************************* 330 * This cpu has been turned on. Enter RMM to initialise R-EL2. Entry into RMM 331 * is done after initialising minimal architectural state that guarantees safe 332 * execution. 333 ******************************************************************************/ 334 static void *rmmd_cpu_on_finish_handler(const void *arg) 335 { 336 long rc; 337 uint32_t linear_id = plat_my_core_pos(); 338 rmmd_rmm_context_t *ctx = &rmm_context[linear_id]; 339 340 if (rmm_boot_failed) { 341 /* RMM Boot failed on a previous CPU. Abort. */ 342 ERROR("RMM Failed to initialize. Ignoring for CPU%d\n", 343 linear_id); 344 return NULL; 345 } 346 347 /* 348 * Prepare warmboot arguments for RMM: 349 * arg0: This CPUID. 350 * arg1 to arg3: Not used. 351 */ 352 rmm_ep_info->args.arg0 = linear_id; 353 rmm_ep_info->args.arg1 = 0ULL; 354 rmm_ep_info->args.arg2 = 0ULL; 355 rmm_ep_info->args.arg3 = 0ULL; 356 357 /* Initialise RMM context with this entry point information */ 358 cm_setup_context(&ctx->cpu_ctx, rmm_ep_info); 359 360 /* Enable architecture extensions */ 361 manage_extensions_realm(&ctx->cpu_ctx); 362 363 /* Initialize RMM EL2 context. */ 364 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 365 366 rc = rmmd_rmm_sync_entry(ctx); 367 368 if (rc != E_RMM_BOOT_SUCCESS) { 369 ERROR("RMM init failed on CPU%d: %ld\n", linear_id, rc); 370 /* Mark the boot as failed for any other booting CPU */ 371 rmm_boot_failed = true; 372 } 373 374 return NULL; 375 } 376 377 /* Subscribe to PSCI CPU on to initialize RMM on secondary */ 378 SUBSCRIBE_TO_EVENT(psci_cpu_on_finish, rmmd_cpu_on_finish_handler); 379 380 /* Convert GPT lib error to RMMD GTS error */ 381 static int gpt_to_gts_error(int error, uint32_t smc_fid, uint64_t address) 382 { 383 int ret; 384 385 if (error == 0) { 386 return E_RMM_OK; 387 } 388 389 if (error == -EINVAL) { 390 ret = E_RMM_BAD_ADDR; 391 } else { 392 /* This is the only other error code we expect */ 393 assert(error == -EPERM); 394 ret = E_RMM_BAD_PAS; 395 } 396 397 ERROR("RMMD: PAS Transition failed. GPT ret = %d, PA: 0x%"PRIx64 ", FID = 0x%x\n", 398 error, address, smc_fid); 399 return ret; 400 } 401 402 /******************************************************************************* 403 * This function handles RMM-EL3 interface SMCs 404 ******************************************************************************/ 405 uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 406 uint64_t x3, uint64_t x4, void *cookie, 407 void *handle, uint64_t flags) 408 { 409 uint32_t src_sec_state; 410 int ret; 411 412 /* If RMM failed to boot, treat any RMM-EL3 interface SMC as unknown */ 413 if (rmm_boot_failed) { 414 WARN("RMMD: Failed to boot up RMM. Ignoring RMM-EL3 call\n"); 415 SMC_RET1(handle, SMC_UNK); 416 } 417 418 /* Determine which security state this SMC originated from */ 419 src_sec_state = caller_sec_state(flags); 420 421 if (src_sec_state != SMC_FROM_REALM) { 422 WARN("RMMD: RMM-EL3 call originated from secure or normal world\n"); 423 SMC_RET1(handle, SMC_UNK); 424 } 425 426 switch (smc_fid) { 427 case RMM_GTSI_DELEGATE: 428 ret = gpt_delegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 429 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 430 case RMM_GTSI_UNDELEGATE: 431 ret = gpt_undelegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 432 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 433 case RMM_ATTEST_GET_PLAT_TOKEN: 434 ret = rmmd_attest_get_platform_token(x1, &x2, x3); 435 SMC_RET2(handle, ret, x2); 436 case RMM_ATTEST_GET_REALM_KEY: 437 ret = rmmd_attest_get_signing_key(x1, &x2, x3); 438 SMC_RET2(handle, ret, x2); 439 440 case RMM_BOOT_COMPLETE: 441 VERBOSE("RMMD: running rmmd_rmm_sync_exit\n"); 442 rmmd_rmm_sync_exit(x1); 443 444 default: 445 WARN("RMMD: Unsupported RMM-EL3 call 0x%08x\n", smc_fid); 446 SMC_RET1(handle, SMC_UNK); 447 } 448 } 449