1 /* 2 * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <arch.h> 12 #include <arch_features.h> 13 #include <arch_helpers.h> 14 #include <bl1/bl1.h> 15 #include <common/bl_common.h> 16 #include <common/debug.h> 17 #include <drivers/auth/auth_mod.h> 18 #include <drivers/auth/crypto_mod.h> 19 #include <drivers/console.h> 20 #include <lib/bootmarker_capture.h> 21 #include <lib/cpus/errata.h> 22 #include <lib/pmf/pmf.h> 23 #include <lib/utils.h> 24 #include <plat/common/platform.h> 25 #include <smccc_helpers.h> 26 #include <tools_share/uuid.h> 27 28 #include "bl1_private.h" 29 30 static void bl1_load_bl2(void); 31 32 #if ENABLE_PAUTH 33 uint64_t bl1_apiakey[2]; 34 #endif 35 36 #if ENABLE_RUNTIME_INSTRUMENTATION 37 PMF_REGISTER_SERVICE(bl_svc, PMF_RT_INSTR_SVC_ID, 38 BL_TOTAL_IDS, PMF_DUMP_ENABLE) 39 #endif 40 41 /******************************************************************************* 42 * Setup function for BL1. 43 ******************************************************************************/ 44 void bl1_setup(void) 45 { 46 /* Perform early platform-specific setup */ 47 bl1_early_platform_setup(); 48 49 /* Perform late platform-specific setup */ 50 bl1_plat_arch_setup(); 51 52 #if CTX_INCLUDE_PAUTH_REGS 53 /* 54 * Assert that the ARMv8.3-PAuth registers are present or an access 55 * fault will be triggered when they are being saved or restored. 56 */ 57 assert(is_armv8_3_pauth_present()); 58 #endif /* CTX_INCLUDE_PAUTH_REGS */ 59 } 60 61 /******************************************************************************* 62 * Function to perform late architectural and platform specific initialization. 63 * It also queries the platform to load and run next BL image. Only called 64 * by the primary cpu after a cold boot. 65 ******************************************************************************/ 66 void bl1_main(void) 67 { 68 unsigned int image_id; 69 70 #if ENABLE_RUNTIME_INSTRUMENTATION 71 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_ENTRY, PMF_CACHE_MAINT); 72 #endif 73 74 /* Announce our arrival */ 75 NOTICE(FIRMWARE_WELCOME_STR); 76 NOTICE("BL1: %s\n", version_string); 77 NOTICE("BL1: %s\n", build_message); 78 79 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT); 80 81 print_errata_status(); 82 83 #if ENABLE_ASSERTIONS 84 u_register_t val; 85 /* 86 * Ensure that MMU/Caches and coherency are turned on 87 */ 88 #ifdef __aarch64__ 89 val = read_sctlr_el3(); 90 #else 91 val = read_sctlr(); 92 #endif 93 assert((val & SCTLR_M_BIT) != 0); 94 assert((val & SCTLR_C_BIT) != 0); 95 assert((val & SCTLR_I_BIT) != 0); 96 /* 97 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 98 * provided platform value 99 */ 100 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 101 /* 102 * If CWG is zero, then no CWG information is available but we can 103 * at least check the platform value is less than the architectural 104 * maximum. 105 */ 106 if (val != 0) 107 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 108 else 109 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 110 #endif /* ENABLE_ASSERTIONS */ 111 112 /* Perform remaining generic architectural setup from EL3 */ 113 bl1_arch_setup(); 114 115 crypto_mod_init(); 116 117 /* Initialize authentication module */ 118 auth_mod_init(); 119 120 /* Initialize the measured boot */ 121 bl1_plat_mboot_init(); 122 123 /* Perform platform setup in BL1. */ 124 bl1_platform_setup(); 125 126 #if ENABLE_PAUTH 127 /* Store APIAKey_EL1 key */ 128 bl1_apiakey[0] = read_apiakeylo_el1(); 129 bl1_apiakey[1] = read_apiakeyhi_el1(); 130 #endif /* ENABLE_PAUTH */ 131 132 /* Get the image id of next image to load and run. */ 133 image_id = bl1_plat_get_next_image_id(); 134 135 /* 136 * We currently interpret any image id other than 137 * BL2_IMAGE_ID as the start of firmware update. 138 */ 139 if (image_id == BL2_IMAGE_ID) 140 bl1_load_bl2(); 141 else 142 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 143 144 /* Teardown the measured boot driver */ 145 bl1_plat_mboot_finish(); 146 147 bl1_prepare_next_image(image_id); 148 149 #if ENABLE_RUNTIME_INSTRUMENTATION 150 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_EXIT, PMF_CACHE_MAINT); 151 #endif 152 153 console_flush(); 154 } 155 156 /******************************************************************************* 157 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 158 * Called by the primary cpu after a cold boot. 159 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 160 * loader etc. 161 ******************************************************************************/ 162 static void bl1_load_bl2(void) 163 { 164 image_desc_t *desc; 165 image_info_t *info; 166 int err; 167 168 /* Get the image descriptor */ 169 desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 170 assert(desc != NULL); 171 172 /* Get the image info */ 173 info = &desc->image_info; 174 INFO("BL1: Loading BL2\n"); 175 176 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID); 177 if (err != 0) { 178 ERROR("Failure in pre image load handling of BL2 (%d)\n", err); 179 plat_error_handler(err); 180 } 181 182 err = load_auth_image(BL2_IMAGE_ID, info); 183 if (err != 0) { 184 ERROR("Failed to load BL2 firmware.\n"); 185 plat_error_handler(err); 186 } 187 188 /* Allow platform to handle image information. */ 189 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID); 190 if (err != 0) { 191 ERROR("Failure in post image load handling of BL2 (%d)\n", err); 192 plat_error_handler(err); 193 } 194 195 NOTICE("BL1: Booting BL2\n"); 196 } 197 198 /******************************************************************************* 199 * Function called just before handing over to the next BL to inform the user 200 * about the boot progress. In debug mode, also print details about the BL 201 * image's execution context. 202 ******************************************************************************/ 203 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 204 { 205 #ifdef __aarch64__ 206 NOTICE("BL1: Booting BL31\n"); 207 #else 208 NOTICE("BL1: Booting BL32\n"); 209 #endif /* __aarch64__ */ 210 print_entry_point_info(bl_ep_info); 211 } 212 213 #if SPIN_ON_BL1_EXIT 214 void print_debug_loop_message(void) 215 { 216 NOTICE("BL1: Debug loop, spinning forever\n"); 217 NOTICE("BL1: Please connect the debugger to continue\n"); 218 } 219 #endif 220 221 /******************************************************************************* 222 * Top level handler for servicing BL1 SMCs. 223 ******************************************************************************/ 224 u_register_t bl1_smc_handler(unsigned int smc_fid, 225 u_register_t x1, 226 u_register_t x2, 227 u_register_t x3, 228 u_register_t x4, 229 void *cookie, 230 void *handle, 231 unsigned int flags) 232 { 233 /* BL1 Service UUID */ 234 DEFINE_SVC_UUID2(bl1_svc_uid, 235 U(0xd46739fd), 0xcb72, 0x9a4d, 0xb5, 0x75, 236 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 237 238 239 #if TRUSTED_BOARD_BOOT 240 /* 241 * Dispatch FWU calls to FWU SMC handler and return its return 242 * value 243 */ 244 if (is_fwu_fid(smc_fid)) { 245 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 246 handle, flags); 247 } 248 #endif 249 250 switch (smc_fid) { 251 case BL1_SMC_CALL_COUNT: 252 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 253 254 case BL1_SMC_UID: 255 SMC_UUID_RET(handle, bl1_svc_uid); 256 257 case BL1_SMC_VERSION: 258 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 259 260 default: 261 WARN("Unimplemented BL1 SMC Call: 0x%x\n", smc_fid); 262 SMC_RET1(handle, SMC_UNK); 263 } 264 } 265 266 /******************************************************************************* 267 * BL1 SMC wrapper. This function is only used in AArch32 mode to ensure ABI 268 * compliance when invoking bl1_smc_handler. 269 ******************************************************************************/ 270 u_register_t bl1_smc_wrapper(uint32_t smc_fid, 271 void *cookie, 272 void *handle, 273 unsigned int flags) 274 { 275 u_register_t x1, x2, x3, x4; 276 277 assert(handle != NULL); 278 279 get_smc_params_from_ctx(handle, x1, x2, x3, x4); 280 return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 281 } 282