1 /* 2 * Copyright (C) 2018-2023, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32MP_COMMON_H 8 #define STM32MP_COMMON_H 9 10 #include <stdbool.h> 11 12 #include <platform_def.h> 13 14 #define JEDEC_ST_BKID U(0x0) 15 #define JEDEC_ST_MFID U(0x20) 16 17 /* FWU configuration (max supported value is 15) */ 18 #define FWU_MAX_TRIAL_REBOOT U(3) 19 20 /* Functions to save and get boot context address given by ROM code */ 21 void stm32mp_save_boot_ctx_address(uintptr_t address); 22 uintptr_t stm32mp_get_boot_ctx_address(void); 23 uint16_t stm32mp_get_boot_itf_selected(void); 24 25 bool stm32mp_is_single_core(void); 26 bool stm32mp_is_closed_device(void); 27 bool stm32mp_is_auth_supported(void); 28 29 /* Return the base address of the DDR controller */ 30 uintptr_t stm32mp_ddrctrl_base(void); 31 32 /* Return the base address of the DDR PHY */ 33 uintptr_t stm32mp_ddrphyc_base(void); 34 35 /* Return the base address of the PWR peripheral */ 36 uintptr_t stm32mp_pwr_base(void); 37 38 /* Return the base address of the RCC peripheral */ 39 uintptr_t stm32mp_rcc_base(void); 40 41 void stm32mp_gic_pcpu_init(void); 42 void stm32mp_gic_init(void); 43 44 /* Check MMU status to allow spinlock use */ 45 bool stm32mp_lock_available(void); 46 47 int stm32_get_otp_index(const char *otp_name, uint32_t *otp_idx, 48 uint32_t *otp_len); 49 int stm32_get_otp_value(const char *otp_name, uint32_t *otp_val); 50 int stm32_get_otp_value_from_idx(const uint32_t otp_idx, uint32_t *otp_val); 51 52 /* Get IWDG platform instance ID from peripheral IO memory base address */ 53 uint32_t stm32_iwdg_get_instance(uintptr_t base); 54 55 /* Return bitflag mask for expected IWDG configuration from OTP content */ 56 uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); 57 58 #if defined(IMAGE_BL2) 59 /* Update OTP shadow registers with IWDG configuration from device tree */ 60 uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); 61 #endif 62 63 #if STM32MP_UART_PROGRAMMER || !defined(IMAGE_BL2) 64 /* Get the UART address from its instance number */ 65 uintptr_t get_uart_address(uint32_t instance_nb); 66 #endif 67 68 /* Setup the UART console */ 69 int stm32mp_uart_console_setup(void); 70 71 #if STM32MP_EARLY_CONSOLE 72 void stm32mp_setup_early_console(void); 73 #else 74 static inline void stm32mp_setup_early_console(void) 75 { 76 } 77 #endif 78 79 /* 80 * Platform util functions for the GPIO driver 81 * @bank: Target GPIO bank ID as per DT bindings 82 * 83 * Platform shall implement these functions to provide to stm32_gpio 84 * driver the resource reference for a target GPIO bank. That are 85 * memory mapped interface base address, interface offset (see below) 86 * and clock identifier. 87 * 88 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 89 * check DT configuration matches platform implementation of the banks 90 * description. 91 */ 92 uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 93 unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 94 uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 95 bool stm32_gpio_is_secure_at_reset(unsigned int bank); 96 97 /* Return node offset for target GPIO bank ID @bank or a FDT error code */ 98 int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank); 99 100 /* Get the chip revision */ 101 uint32_t stm32mp_get_chip_version(void); 102 /* Get the chip device ID */ 103 uint32_t stm32mp_get_chip_dev_id(void); 104 105 /* Get SOC name */ 106 #define STM32_SOC_NAME_SIZE 20 107 void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]); 108 109 /* Print CPU information */ 110 void stm32mp_print_cpuinfo(void); 111 112 /* Print board information */ 113 void stm32mp_print_boardinfo(void); 114 115 /* Initialise the IO layer and register platform IO devices */ 116 void stm32mp_io_setup(void); 117 118 /* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */ 119 int stm32mp_map_ddr_non_cacheable(void); 120 int stm32mp_unmap_ddr(void); 121 122 /* Function to save boot info */ 123 void stm32_save_boot_info(boot_api_context_t *boot_context); 124 /* Function to get boot peripheral info */ 125 void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance); 126 /* Function to get BOOT_MODE backup register address */ 127 uintptr_t stm32_get_bkpr_boot_mode_addr(void); 128 129 /* Display board information from the value found in OTP fuse */ 130 void stm32_display_board_info(uint32_t board_id); 131 132 #if PSA_FWU_SUPPORT 133 void stm32mp1_fwu_set_boot_idx(void); 134 uint32_t stm32_get_and_dec_fwu_trial_boot_cnt(void); 135 void stm32_set_max_fwu_trial_boot_cnt(void); 136 #endif /* PSA_FWU_SUPPORT */ 137 138 #endif /* STM32MP_COMMON_H */ 139