1# 2# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include lib/libfdt/libfdt.mk 8include common/fdt_wrappers.mk 9 10PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 11 -I${PLAT_QEMU_COMMON_PATH}/include \ 12 -I${PLAT_QEMU_PATH}/include \ 13 -Iinclude/common/tbbr 14 15ifeq (${ARCH},aarch32) 16QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S 17else 18QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ 19 lib/cpus/aarch64/cortex_a53.S \ 20 lib/cpus/aarch64/cortex_a55.S \ 21 lib/cpus/aarch64/cortex_a57.S \ 22 lib/cpus/aarch64/cortex_a72.S \ 23 lib/cpus/aarch64/cortex_a76.S \ 24 lib/cpus/aarch64/cortex_a710.S \ 25 lib/cpus/aarch64/neoverse_n_common.S \ 26 lib/cpus/aarch64/neoverse_n1.S \ 27 lib/cpus/aarch64/neoverse_v1.S \ 28 lib/cpus/aarch64/neoverse_n2.S \ 29 lib/cpus/aarch64/qemu_max.S 30 31PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 32 33# Cpu core architecture level: 34# v8.0: a53, a57, a72 35# v8.2: a76, n1 36# v8.4: v1 37# v9.0: a710, n2 38# 39# let treat v9.0 as v8.5 as they share cpu features 40# https://developer.arm.com/documentation/102378/0201/Armv8-x-and-Armv9-x-extensions-and-features 41 42ARM_ARCH_MAJOR := 8 43ARM_ARCH_MINOR := 5 44endif 45 46PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 47 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 48 drivers/arm/pl011/${ARCH}/pl011_console.S 49 50include lib/xlat_tables_v2/xlat_tables.mk 51PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 52 53ifneq ($(ENABLE_STACK_PROTECTOR), 0) 54 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 55endif 56 57BL1_SOURCES += drivers/io/io_semihosting.c \ 58 drivers/io/io_storage.c \ 59 drivers/io/io_fip.c \ 60 drivers/io/io_memmap.c \ 61 lib/semihosting/semihosting.c \ 62 lib/semihosting/${ARCH}/semihosting_call.S \ 63 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 64 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 65 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \ 66 ${QEMU_CPU_LIBS} 67 68BL2_SOURCES += drivers/io/io_semihosting.c \ 69 drivers/io/io_storage.c \ 70 drivers/io/io_fip.c \ 71 drivers/io/io_memmap.c \ 72 lib/semihosting/semihosting.c \ 73 lib/semihosting/${ARCH}/semihosting_call.S \ 74 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 75 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 76 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 77 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 78 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 79 common/desc_image_load.c \ 80 common/fdt_fixup.c 81 82BL31_SOURCES += ${QEMU_CPU_LIBS} \ 83 lib/semihosting/semihosting.c \ 84 lib/semihosting/${ARCH}/semihosting_call.S \ 85 plat/common/plat_psci_common.c \ 86 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 87 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 88 common/fdt_fixup.c \ 89 ${QEMU_GIC_SOURCES} 90 91# CPU flag enablement 92ifeq (${ARCH},aarch64) 93 94# Later QEMU versions support SME and SVE. 95# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks) 96ifeq (${SPM_MM},1) 97 ENABLE_SVE_FOR_NS := 0 98 ENABLE_SME_FOR_NS := 0 99else 100 ENABLE_SVE_FOR_NS := 2 101 ENABLE_SME_FOR_NS := 2 102endif 103 104# QEMU will use the RNDR instruction for the stack protector canary. 105ENABLE_FEAT_RNG := 2 106 107# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max 108ENABLE_FEAT_FGT := 2 109 110# Treating this as a memory-constrained port for now 111USE_COHERENT_MEM := 0 112 113# This can be overridden depending on CPU(s) used in the QEMU image 114HW_ASSISTED_COHERENCY := 1 115 116CTX_INCLUDE_AARCH32_REGS := 0 117ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 118$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 119endif 120 121# Pointer Authentication sources 122ifeq (${ENABLE_PAUTH}, 1) 123PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 124CTX_INCLUDE_PAUTH_REGS := 1 125endif 126 127endif 128