1 /* 2 * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/bl_common.h> 8 #include <drivers/console.h> 9 #include <drivers/generic_delay_timer.h> 10 #include <lib/mmio.h> 11 #include <lib/xlat_tables/xlat_mmu_helpers.h> 12 #include <lib/xlat_tables/xlat_tables_v2.h> 13 14 #include "msm8916_gicv2.h" 15 #include <msm8916_mmap.h> 16 #include "msm8916_setup.h" 17 #include <uartdm_console.h> 18 19 static const mmap_region_t msm8916_mmap[] = { 20 MAP_REGION_FLAT(PCNOC_BASE, PCNOC_SIZE, 21 MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), 22 MAP_REGION_FLAT(APCS_BASE, APCS_SIZE, 23 MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), 24 {}, 25 }; 26 27 static console_t console; 28 29 unsigned int plat_get_syscnt_freq2(void) 30 { 31 return PLAT_SYSCNT_FREQ; 32 } 33 34 #define GPIO_CFG_FUNC(n) ((n) << 2) 35 #define GPIO_CFG_DRV_STRENGTH_MA(ma) (((ma) / 2 - 1) << 6) 36 37 #define CLK_ENABLE BIT_32(0) 38 #define CLK_OFF BIT_32(31) 39 #define GCC_BLSP1_AHB_CBCR (GCC_BASE + 0x01008) 40 #define GCC_BLSP1_UART_APPS_CBCR(n) (GCC_BASE + \ 41 (((n) == 2) ? (0x0302c) : (0x0203c + (((n) - 1) * 0x1000)))) 42 #define GCC_APCS_CLOCK_BRANCH_ENA_VOTE (GCC_BASE + 0x45004) 43 #define BLSP1_AHB_CLK_ENA BIT_32(10) 44 45 struct uartdm_gpios { 46 unsigned int tx, rx, func; 47 }; 48 49 static const struct uartdm_gpios uartdm_gpio_map[] = { 50 {0, 1, 0x2}, {4, 5, 0x2}, 51 }; 52 53 /* 54 * The previous boot stage seems to disable most of the UART setup before exit 55 * so it must be enabled here again before the UART console can be used. 56 */ 57 static void msm8916_enable_blsp_uart(void) 58 { 59 const struct uartdm_gpios *gpios = &uartdm_gpio_map[QTI_UART_NUM - 1]; 60 61 CASSERT(QTI_UART_NUM > 0 && QTI_UART_NUM <= ARRAY_SIZE(uartdm_gpio_map), 62 assert_qti_blsp_uart_valid); 63 64 /* Route GPIOs to BLSP UART */ 65 mmio_write_32(TLMM_GPIO_CFG(gpios->tx), GPIO_CFG_FUNC(gpios->func) | 66 GPIO_CFG_DRV_STRENGTH_MA(8)); 67 mmio_write_32(TLMM_GPIO_CFG(gpios->rx), GPIO_CFG_FUNC(gpios->func) | 68 GPIO_CFG_DRV_STRENGTH_MA(8)); 69 70 /* Enable AHB clock */ 71 mmio_setbits_32(GCC_APCS_CLOCK_BRANCH_ENA_VOTE, BLSP1_AHB_CLK_ENA); 72 while (mmio_read_32(GCC_BLSP1_AHB_CBCR) & CLK_OFF) 73 ; 74 75 /* Enable BLSP UART clock */ 76 mmio_setbits_32(GCC_BLSP1_UART_APPS_CBCR(QTI_UART_NUM), CLK_ENABLE); 77 while (mmio_read_32(GCC_BLSP1_UART_APPS_CBCR(QTI_UART_NUM)) & CLK_OFF) 78 ; 79 } 80 81 void msm8916_early_platform_setup(void) 82 { 83 /* Initialize the debug console as early as possible */ 84 msm8916_enable_blsp_uart(); 85 console_uartdm_register(&console, BLSP_UART_BASE); 86 87 if (QTI_RUNTIME_UART) { 88 /* Mark UART as runtime usable */ 89 console_set_scope(&console, CONSOLE_FLAG_BOOT | 90 CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH); 91 } 92 } 93 94 void msm8916_plat_arch_setup(uintptr_t base, size_t size) 95 { 96 mmap_add_region(base, base, size, MT_RW_DATA | MT_SECURE); 97 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 98 BL_CODE_END - BL_CODE_BASE, 99 MT_CODE | MT_SECURE); 100 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, 101 BL_RO_DATA_END - BL_RO_DATA_BASE, 102 MT_RO_DATA | MT_SECURE); 103 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 104 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 105 MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER); 106 107 mmap_add(msm8916_mmap); 108 init_xlat_tables(); 109 } 110 111 void msm8916_platform_setup(void) 112 { 113 generic_delay_timer_init(); 114 msm8916_gicv2_init(); 115 } 116