xref: /rk3399_ARM-atf/plat/xilinx/common/plat_startup.c (revision f7d445fcbbd3d5146d95698ace3381fcf522b9af)
1 /*
2  * Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved.
3  * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include <assert.h>
9 #include <inttypes.h>
10 #include <stdint.h>
11 
12 #include <arch_helpers.h>
13 #include <common/debug.h>
14 #include <plat_startup.h>
15 
16 
17 /*
18  * TFAHandoffParams
19  * Parameter		bitfield	encoding
20  * -----------------------------------------------------------------------------
21  * Exec State		0		0 -> Aarch64, 1-> Aarch32
22  * endianness		1		0 -> LE, 1 -> BE
23  * secure (TZ)		2		0 -> Non secure, 1 -> secure
24  * EL			3:4		00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3
25  * CPU#			5:6		00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3
26  */
27 
28 #define FSBL_FLAGS_ESTATE_SHIFT		0U
29 #define FSBL_FLAGS_ESTATE_MASK		(1U << FSBL_FLAGS_ESTATE_SHIFT)
30 #define FSBL_FLAGS_ESTATE_A64		0U
31 #define FSBL_FLAGS_ESTATE_A32		1U
32 
33 #define FSBL_FLAGS_ENDIAN_SHIFT		1U
34 #define FSBL_FLAGS_ENDIAN_MASK		(1U << FSBL_FLAGS_ENDIAN_SHIFT)
35 #define FSBL_FLAGS_ENDIAN_LE		0U
36 #define FSBL_FLAGS_ENDIAN_BE		1U
37 
38 #define FSBL_FLAGS_TZ_SHIFT		2U
39 #define FSBL_FLAGS_TZ_MASK		(1U << FSBL_FLAGS_TZ_SHIFT)
40 #define FSBL_FLAGS_NON_SECURE		0U
41 #define FSBL_FLAGS_SECURE		1U
42 
43 #define FSBL_FLAGS_EL_SHIFT		3U
44 #define FSBL_FLAGS_EL_MASK		(3U << FSBL_FLAGS_EL_SHIFT)
45 #define FSBL_FLAGS_EL0			0U
46 #define FSBL_FLAGS_EL1			1U
47 #define FSBL_FLAGS_EL2			2U
48 #define FSBL_FLAGS_EL3			3U
49 
50 #define FSBL_FLAGS_CPU_SHIFT		5U
51 #define FSBL_FLAGS_CPU_MASK		(3U << FSBL_FLAGS_CPU_SHIFT)
52 #define FSBL_FLAGS_A53_0		0U
53 #define FSBL_FLAGS_A53_1		1U
54 #define FSBL_FLAGS_A53_2		2U
55 #define FSBL_FLAGS_A53_3		3U
56 
57 /**
58  * @partition: Pointer to partition struct
59  *
60  * Get the target CPU for @partition.
61  *
62  * Return: FSBL_FLAGS_A53_0, FSBL_FLAGS_A53_1, FSBL_FLAGS_A53_2 or FSBL_FLAGS_A53_3
63  */
64 static int32_t get_fsbl_cpu(const struct xfsbl_partition *partition)
65 {
66 	uint64_t flags = partition->flags & FSBL_FLAGS_CPU_MASK;
67 
68 	return flags >> FSBL_FLAGS_CPU_SHIFT;
69 }
70 
71 /**
72  * @partition: Pointer to partition struct
73  *
74  * Get the target exception level for @partition.
75  *
76  * Return: FSBL_FLAGS_EL0, FSBL_FLAGS_EL1, FSBL_FLAGS_EL2 or FSBL_FLAGS_EL3
77  */
78 static int32_t get_fsbl_el(const struct xfsbl_partition *partition)
79 {
80 	uint64_t flags = partition->flags & FSBL_FLAGS_EL_MASK;
81 
82 	return flags >> FSBL_FLAGS_EL_SHIFT;
83 }
84 
85 /**
86  * @partition: Pointer to partition struct
87  *
88  * Get the target security state for @partition.
89  *
90  * Return: FSBL_FLAGS_NON_SECURE or FSBL_FLAGS_SECURE
91  */
92 static int32_t get_fsbl_ss(const struct xfsbl_partition *partition)
93 {
94 	uint64_t flags = partition->flags & FSBL_FLAGS_TZ_MASK;
95 
96 	return flags >> FSBL_FLAGS_TZ_SHIFT;
97 }
98 
99 /**
100  * @partition: Pointer to partition struct
101  *
102  * Get the target endianness for @partition.
103  *
104  * Return: SPSR_E_LITTLE or SPSR_E_BIG
105  */
106 static int32_t get_fsbl_endian(const struct xfsbl_partition *partition)
107 {
108 	uint64_t flags = partition->flags & FSBL_FLAGS_ENDIAN_MASK;
109 
110 	flags >>= FSBL_FLAGS_ENDIAN_SHIFT;
111 
112 	if (flags == FSBL_FLAGS_ENDIAN_BE) {
113 		return SPSR_E_BIG;
114 	} else {
115 		return SPSR_E_LITTLE;
116 	}
117 }
118 
119 /**
120  * @partition: Pointer to partition struct
121  *
122  * Get the target execution state for @partition.
123  *
124  * Return: FSBL_FLAGS_ESTATE_A32 or FSBL_FLAGS_ESTATE_A64
125  */
126 static int32_t get_fsbl_estate(const struct xfsbl_partition *partition)
127 {
128 	uint64_t flags = partition->flags & FSBL_FLAGS_ESTATE_MASK;
129 
130 	return flags >> FSBL_FLAGS_ESTATE_SHIFT;
131 }
132 
133 /**
134  * Populates the bl32 and bl33 image info structures
135  * @bl32:	BL32 image info structure
136  * @bl33:	BL33 image info structure
137  * tfa_handoff_addr:  TF-A handoff address
138  *
139  * Process the handoff parameters from the FSBL and populate the BL32 and BL33
140  * image info structures accordingly.
141  *
142  * Return: Return the status of the handoff. The value will be from the
143  *         fsbl_handoff enum.
144  */
145 enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
146 					entry_point_info_t *bl33,
147 					uint64_t tfa_handoff_addr)
148 {
149 	const struct xfsbl_tfa_handoff_params *TFAHandoffParams;
150 	if (!tfa_handoff_addr) {
151 		WARN("BL31: No TFA handoff structure passed\n");
152 		return FSBL_HANDOFF_NO_STRUCT;
153 	}
154 
155 	TFAHandoffParams = (struct xfsbl_tfa_handoff_params *)tfa_handoff_addr;
156 	if ((TFAHandoffParams->magic[0] != 'X') ||
157 	    (TFAHandoffParams->magic[1] != 'L') ||
158 	    (TFAHandoffParams->magic[2] != 'N') ||
159 	    (TFAHandoffParams->magic[3] != 'X')) {
160 		ERROR("BL31: invalid TF-A handoff structure at %" PRIx64 "\n",
161 		      tfa_handoff_addr);
162 		return FSBL_HANDOFF_INVAL_STRUCT;
163 	}
164 
165 	VERBOSE("BL31: TF-A handoff params at:0x%" PRIx64 ", entries:%u\n",
166 		tfa_handoff_addr, TFAHandoffParams->num_entries);
167 	if (TFAHandoffParams->num_entries > FSBL_MAX_PARTITIONS) {
168 		ERROR("BL31: TF-A handoff params: too many partitions (%u/%u)\n",
169 		      TFAHandoffParams->num_entries, FSBL_MAX_PARTITIONS);
170 		return FSBL_HANDOFF_TOO_MANY_PARTS;
171 	}
172 
173 	/*
174 	 * we loop over all passed entries but only populate two image structs
175 	 * (bl32, bl33). I.e. the last applicable images in the handoff
176 	 * structure will be used for the hand off
177 	 */
178 	for (size_t i = 0; i < TFAHandoffParams->num_entries; i++) {
179 		entry_point_info_t *image;
180 		int32_t target_estate, target_secure, target_cpu;
181 		uint32_t target_endianness, target_el;
182 
183 		VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i,
184 			TFAHandoffParams->partition[i].entry_point,
185 			TFAHandoffParams->partition[i].flags);
186 
187 		target_cpu = get_fsbl_cpu(&TFAHandoffParams->partition[i]);
188 		if (target_cpu != FSBL_FLAGS_A53_0) {
189 			WARN("BL31: invalid target CPU (%i)\n", target_cpu);
190 			continue;
191 		}
192 
193 		target_el = get_fsbl_el(&TFAHandoffParams->partition[i]);
194 		if ((target_el == FSBL_FLAGS_EL3) ||
195 		    (target_el == FSBL_FLAGS_EL0)) {
196 			WARN("BL31: invalid exception level (%i)\n", target_el);
197 			continue;
198 		}
199 
200 		target_secure = get_fsbl_ss(&TFAHandoffParams->partition[i]);
201 		if (target_secure == FSBL_FLAGS_SECURE &&
202 		    target_el == FSBL_FLAGS_EL2) {
203 			WARN("BL31: invalid security state (%i) for exception level (%i)\n",
204 			     target_secure, target_el);
205 			continue;
206 		}
207 
208 		target_estate = get_fsbl_estate(&TFAHandoffParams->partition[i]);
209 		target_endianness = get_fsbl_endian(&TFAHandoffParams->partition[i]);
210 
211 		if (target_secure == FSBL_FLAGS_SECURE) {
212 			image = bl32;
213 
214 			if (target_estate == FSBL_FLAGS_ESTATE_A32) {
215 				bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
216 							 target_endianness,
217 							 DISABLE_ALL_EXCEPTIONS);
218 			} else {
219 				bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
220 						     DISABLE_ALL_EXCEPTIONS);
221 			}
222 		} else {
223 			image = bl33;
224 
225 			if (target_estate == FSBL_FLAGS_ESTATE_A32) {
226 				if (target_el == FSBL_FLAGS_EL2) {
227 					target_el = MODE32_hyp;
228 				} else {
229 					target_el = MODE32_sys;
230 				}
231 
232 				bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM,
233 							 target_endianness,
234 							 DISABLE_ALL_EXCEPTIONS);
235 			} else {
236 				if (target_el == FSBL_FLAGS_EL2) {
237 					target_el = MODE_EL2;
238 				} else {
239 					target_el = MODE_EL1;
240 				}
241 
242 				bl33->spsr = SPSR_64(target_el, MODE_SP_ELX,
243 						     DISABLE_ALL_EXCEPTIONS);
244 			}
245 		}
246 
247 		VERBOSE("Setting up %s entry point to:%" PRIx64 ", el:%x\n",
248 			target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33",
249 			TFAHandoffParams->partition[i].entry_point,
250 			target_el);
251 		image->pc = TFAHandoffParams->partition[i].entry_point;
252 
253 		if (target_endianness == SPSR_E_BIG) {
254 			EP_SET_EE(image->h.attr, EP_EE_BIG);
255 		} else {
256 			EP_SET_EE(image->h.attr, EP_EE_LITTLE);
257 		}
258 	}
259 
260 	return FSBL_HANDOFF_SUCCESS;
261 }
262