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Searched refs:HCLK_I2S0 (Results 1 – 25 of 29) sorted by relevance

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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1126-evb-uvc.dtsi26 clocks = <&cru MCLK_I2S0_TX>, <&cru MCLK_I2S0_RX>, <&cru HCLK_I2S0>,
H A Drv1106-uvc.dtsi44 clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0>,
H A Drk3288-firefly-reload.dts223 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
H A Drv1106.dtsi1387 clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0>;
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3188-cru-common.h113 #define HCLK_I2S0 454 macro
H A Dpx30-cru.h145 #define HCLK_I2S0 262 macro
H A Drk3288-cru.h194 #define HCLK_I2S0 462 macro
H A Drv1106-cru.h56 #define HCLK_I2S0 49 macro
H A Drv1126-cru.h269 #define HCLK_I2S0 205 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3288-cru.h196 #define HCLK_I2S0 462 macro
H A Dpx30-cru.h140 #define HCLK_I2S0 262 macro
H A Drv1106-cru.h55 #define HCLK_I2S0 49 macro
H A Drv1126-cru.h270 #define HCLK_I2S0 205 macro
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3288-veyron-mickey.dts190 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
H A D.rk3288-veyron-mickey.dtb.pre.tmp
H A Drk3188.dtsi84 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
H A Drk3066a.dtsi71 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
H A Drk3288-veyron.dtsi531 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
H A Drv1106.dtsi1161 clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0>;
H A Drk3288.dtsi699 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
H A Dpx30.dtsi243 clocks = <&cru SCLK_I2S0_TX>, <&cru HCLK_I2S0>;
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3288.c696 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK3288_CLKGATE_CON(10), 8, GFLAGS),
H A Dclk-px30.c824 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_bus_pre", 0, PX30_CLKGATE_CON(14), 2, GFLAGS),
H A Dclk-rv1106.c603 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_peri_root", 0,
H A Dclk-rv1126.c710 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_pdaudio", 0,

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